Code review comment for lp:~michaelh1/gcc-linaro/merge-from-aarch64-4.7-r193473-r193768

cbuild successfully built this on x86_64-precise-cbuild410-oort1-xaarch64_barer1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/x86_64-precise-cbuild410-oort1-xaarch64_barer1

+PASS: gcc.target/aarch64/adds.c (test for excess errors)
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tw[0-9]
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tx[0-9]
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times ldxrb\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times stxrb\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-imm.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-imm.c scan-assembler-times \tw[0-9]+, w[0-9]+, #*4096 12
+PASS: gcc.target/aarch64/atomic-op-int.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times ldxr\tx[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times stxr\tw[0-9]+, x[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-seq_cst.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-seq_cst.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-seq_cst.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-short.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-short.c scan-assembler-times ldxrh\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-short.c scan-assembler-times stxrh\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/builtin-bswap-1.c (test for excess errors)
+FAIL: gcc.target/aarch64/builtin-bswap-1.c scan-assembler-times rev16\\t 2
+PASS: gcc.target/aarch64/builtin-bswap-2.c (test for excess errors)
+FAIL: gcc.target/aarch64/builtin-bswap-2.c scan-assembler-times rev16\\t 2
+PASS: gcc.target/aarch64/cmn.c (test for excess errors)
+PASS: gcc.target/aarch64/cmn.c scan-assembler cmn\tw[0-9]
+PASS: gcc.target/aarch64/cmn.c scan-assembler cmn\tx[0-9]
+PASS: gcc.target/aarch64/csinc-2.c (test for excess errors)
+PASS: gcc.target/aarch64/csinc-2.c scan-assembler csinc\tw[0-9].*wzr
+PASS: gcc.target/aarch64/csinc-2.c scan-assembler csinc\tx[0-9].*xzr
+PASS: gcc.target/aarch64/subs.c (test for excess errors)
+PASS: gcc.target/aarch64/subs.c scan-assembler subs\tw[0-9]
...and 1 more

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/x86_64-precise-cbuild410-oort1-xaarch64_barer1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/x86_64-precise-cbuild410-oort1-xaarch64_barer1/gcc-testsuite.txt

cbuild-checked: x86_64-precise-cbuild410-oort1-xaarch64_barer1