Merge lp:~michaelh1/gcc-linaro/merge-from-aarch64-4.7-r193473-r193768 into lp:gcc-linaro/4.7

Proposed by Michael Hope
Status: Merged
Approved by: Michael Hope
Approved revision: no longer in the source branch.
Merge reported by: Michael Hope
Merged at revision: not available
Proposed branch: lp:~michaelh1/gcc-linaro/merge-from-aarch64-4.7-r193473-r193768
Merge into: lp:gcc-linaro/4.7
To merge this branch: bzr merge lp:~michaelh1/gcc-linaro/merge-from-aarch64-4.7-r193473-r193768
Reviewer Review Type Date Requested Status
Christophe Lyon Approve
Review via email: mp+136067@code.launchpad.net

Commit message

Merge from FSF arm/aarch64-4.7-branch r193473..r193768.

Description of the change

2012-11-26 Michael Hope <email address hidden>

 Merge from FSF arm/aarch64-4.7-branch r193473..r193768.

 Backport arm-aarch64-4.7 r193473:
 Backport from mainline: Optimise comparison where intermediate result not used (AArch64)

 Backport arm-aarch64-4.7 r193474:
 Backport from mainline: Use CSINC instead of CSEL to return 1 (AArch64)

 Backport arm-aarch64-4.7 r193496:
 Fixed up changelogs

 Backport arm-aarch64-4.7 r193533:
 Update soft-fp from glibc.

 2012-11-15 Marcus Shawcroft <email address hidden>

 * soft-fp: Updated from glibc upstream.

 Backport arm-aarch64-4.7 r193541:
 Move ChangeLog entry to ChangeLog.aarch64.

 The previous commit put the ChangeLog entry into the wrong file.

 Backport arm-aarch64-4.7 r193572:
 Fix commit of testcase which got truncated somehow.

 Backport arm-aarch64-4.7 r193650:
 Backport from mainline: r193630.

 gcc/
 * config/aarch64/aarch64.c
 (aarch64_output_mi_thunk): Refactor to generate RTL patterns.

 Backport arm-aarch64-4.7 r193652:
 Backport from trunk revision 193651.

 gcc/
 * config/aarch64/aarch64.md
 (define_attr "sync_*"): Remove.
 (define_attr "length"): Update.
 Include atomics.md.
 * config/aarch64/aarch64-protos.h
 (aarch64_expand_compare_and_swap): Add function prototype.
 (aarch64_split_compare_and_swap): Likewise.
 (aarch64_split_atomic_op): Likewise.
 (aarch64_expand_sync): Remove function prototype.
 (aarch64_output_sync_insn): Likewise.
 (aarch64_output_sync_lock_release): Likewise.
 (aarch64_sync_loop_insns): Likewise.
 (struct aarch64_sync_generator): Remove.
 (enum aarch64_sync_generator_tag): Likewise.
 * config/aarch64/aarch64.c
 (aarch64_legitimize_sync_memory): Remove function.
 (aarch64_emit): Likewise.
 (aarch64_insn_count): Likewise.
 (aarch64_output_asm_insn): Likewise.
 (aarch64_load_store_suffix): Likewise.
 (aarch64_output_sync_load): Likewise.
 (aarch64_output_sync_store): Likewise.
 (aarch64_output_op2): Likewise.
 (aarch64_output_op3): Likewise.
 (aarch64_output_sync_loop): Likewise.
 (aarch64_get_sync_operand): Likewise.
 (aarch64_process_output_sync_insn): Likewise.
 (aarch64_output_sync_insn): Likewise.
 (aarch64_output_sync_lock_release): Likewise.
 (aarch64_sync_loop_insns): Likewise.
 (aarch64_call_generator): Likewise.
 (aarch64_expand_sync): Likewise.
 (* emit_f): Remove variable.
 (aarch64_insn_count): Likewise.
 (FETCH_SYNC_OPERAND): Likewise.
 (aarch64_emit_load_exclusive): New function.
 (aarch64_emit_store_exclusive): Likewise.
 (aarch64_emit_unlikely_jump): Likewise.
 (aarch64_expand_compare_and_swap): Likewise.
 (aarch64_split_compare_and_swap): Likewise.
 (aarch64_split_atomic_op): Likewise.
 * config/aarch64/iterators.md
 (atomic_sfx): New mode attribute.
 (atomic_optab): New code attribute.
 (atomic_op_operand): Likewise.
 (atomic_op_str): Likewise.
 (syncop): Rename to atomic_op.
 * config/aarch64/sync.md: Delete.
 * config/aarch64/atomics.md: New file.

 gcc/testsuite
 * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: New testcase.
 * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise.
 * gcc.target/aarch64/atomic-op-acquire.c: Likewise.
 * gcc.target/aarch64/atomic-op-char.c: Likewise.
 * gcc.target/aarch64/atomic-op-consume.c: Likewise.
 * gcc.target/aarch64/atomic-op-imm.c: Likewise.
 * gcc.target/aarch64/atomic-op-int.c: Likewise.
 * gcc.target/aarch64/atomic-op-long.c: Likewise.
 * gcc.target/aarch64/atomic-op-relaxed.c: Likewise.
 * gcc.target/aarch64/atomic-op-release.c: Likewise.
 * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise.
 * gcc.target/aarch64/atomic-op-short.c: Likewise.

 Backport arm-aarch64-4.7 r193655:
 Fix to commit 193652.

 gcc/
 * config/aarch64/atomics.md: Actually add this file.

 gcc/testsuite/
 * gcc.target/aarch64/atomic-comp-swap-release-acquire.c:
 Actually add this file.
 * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise.
 * gcc.target/aarch64/atomic-op-acquire.c: Likewise.
 * gcc.target/aarch64/atomic-op-char.c: Likewise.
 * gcc.target/aarch64/atomic-op-consume.c: Likewise.
 * gcc.target/aarch64/atomic-op-imm.c: Likewise.
 * gcc.target/aarch64/atomic-op-int.c: Likewise.
 * gcc.target/aarch64/atomic-op-long.c: Likewise.
 * gcc.target/aarch64/atomic-op-relaxed.c: Likewise.
 * gcc.target/aarch64/atomic-op-release.c: Likewise.
 * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise.
 * gcc.target/aarch64/atomic-op-short.c: Likewise.

 Backport arm-aarch64-4.7 r193689:
 gcc/
 * config/aarch64/aarch64.c
 (aarch64_output_mi_thunk): Use 4.7 API for plus_constant.

 Backport arm-aarch64-4.7 r193693:
 Fix race in parallel build.

 The gengtype-lex.c is built twice, once for BUILD and once for HOST, but the
 HOST flavour is missing a dependency on $(BCONFIG_H).

 2012-11-21 Marcus Shawcroft <email address hidden>

 * Makefile.in (gengtype-lex.o): Add dependency on $(BCONFIG_H).

 Backport arm-aarch64-4.7 r193696:
 gcc/
 * ChangeLog: Move recent entries to...
 * ChangeLog.aarch64: ...Here.

 gcc/testsuite/
 * ChangeLog: Move recent entries to...
 * ChangeLog.aarch64: ...Here

 Backport arm-aarch64-4.7 r193730:
 Backport of Implement bswaphi2 with rev16 (AArch64)

 Backport arm-aarch64-4.7 r193733:
 [AARCH64-47] Backported removal of Utf documentation.

 2012-11-22 Marcus Shawcroft <email address hidden>

 * doc/md.texi (AArch64 family): Remove Utf.

 Backport arm-aarch64-4.7 r193765:
 Backport of builtin_bswap16 support

 Backport arm-aarch64-4.7 r193768:
 [AARCH64-47] Reverting backport of builtin_bswap16.

 Reverted:
 r193765 | ibolton | 2012-11-23 17:53:08 +0000 (Fri, 23 Nov 2012) | 1 line

 Backport of builtin_bswap16 support

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Revision history for this message
Michael Hope (michaelh1) wrote :

cbuild has taken a snapshot of this branch at r115051 and queued it for build.

The diff against the ancestor r115034 is available at:
 http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768.diff

and will be built on the following builders:
 a9-builder a9hf-builder armv5-builder i686 x86_64 xaarch64 xaarch64_bare

You can track the build queue at:
 http://ex.seabright.co.nz/helpers/scheduler

cbuild-snapshot: gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768
cbuild-ancestor: lp:gcc-linaro+bzr115034
cbuild-state: check

Revision history for this message
Linaro Toolchain Builder (cbuild) wrote :
Download full text (4.9 KiB)

cbuild successfully built this on x86_64-precise-cbuild410-oort1-xaarch64r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/x86_64-precise-cbuild410-oort1-xaarch64r1

+PASS: gcc.target/aarch64/adds.c (test for excess errors)
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tw[0-9]
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tx[0-9]
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times ldxrb\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times stxrb\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-imm.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-imm.c scan-assembler-times \tw[0-9]+, w[0-9]+, #*4096 12
+PASS: gcc.target/aarch64/atomic-op-int.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times ldxr\tx[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times stxr\tw[0-9]+, x[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-seq_cst.c (...

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Linaro Toolchain Builder (cbuild) wrote :
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Linaro Toolchain Builder (cbuild) wrote :
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cbuild successfully built this on x86_64-precise-cbuild410-oort1-xaarch64_barer1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/x86_64-precise-cbuild410-oort1-xaarch64_barer1

+PASS: gcc.target/aarch64/adds.c (test for excess errors)
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tw[0-9]
+PASS: gcc.target/aarch64/adds.c scan-assembler adds\tx[0-9]
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-comp-swap-release-acquire.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 4
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acq_rel.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-acquire.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times ldxrb\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-char.c scan-assembler-times stxrb\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-consume.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-imm.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-imm.c scan-assembler-times \tw[0-9]+, w[0-9]+, #*4096 12
+PASS: gcc.target/aarch64/atomic-op-int.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-int.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times ldxr\tx[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-long.c scan-assembler-times stxr\tw[0-9]+, x[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-relaxed.c scan-assembler-times stxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c (test for excess errors)
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times ldxr\tw[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-release.c scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 6
+PASS: gcc.target/aarch64/atomic-op-s...

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Linaro Toolchain Builder (cbuild) wrote :

cbuild successfully built this on i686-precise-cbuild410-oort2-i686r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/i686-precise-cbuild410-oort2-i686r1

-PASS: gcc.dg/c99-restrict-2.c (test for excess errors)
+FAIL: gcc.dg/c99-restrict-2.c (internal compiler error)
+FAIL: gcc.dg/c99-restrict-2.c (test for excess errors)
-PASS: gfortran.dg/arrayio_3.f90 -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
-PASS: gfortran.dg/arrayio_3.f90 -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions execution test
+FAIL: gfortran.dg/arrayio_3.f90 -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (internal compiler error)
+FAIL: gfortran.dg/arrayio_3.f90 -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+UNRESOLVED: gfortran.dg/arrayio_3.f90 -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions compilation failed to produce executable

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/i686-precise-cbuild410-oort2-i686r1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768/logs/i686-precise-cbuild410-oort2-i686r1/gcc-testsuite.txt

cbuild-checked: i686-precise-cbuild410-oort2-i686r1

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Linaro Toolchain Builder (cbuild) wrote :
Revision history for this message
Linaro Toolchain Builder (cbuild) wrote :
Revision history for this message
Linaro Toolchain Builder (cbuild) wrote :
Revision history for this message
Linaro Toolchain Builder (cbuild) wrote :
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Michael Hope (michaelh1) wrote :

The new bswap failures exist upstream and have been reported to Marcus.

The i686 failure was transient and went away with the second build.

Please review.

Revision history for this message
Christophe Lyon (christophe-lyon) wrote :

I have manually compared the contents of http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.7+bzr115051~michaelh1~merge-from-aarch64-4.7-r193473-r193768.diff (diff against the ancestor r115034) and the result of:
$ svn diff -r193472:193768 svn+ssh://clyon@209.132.180.131/svn/gcc/branches/ARM/aarch64-4.7-branch

There is no difference, except for two files (gcc/config/aarch64/aarch64.c and libgcc/soft-fp/op-common.h) where the diffs were formatted differently. I compared the actual files, which are equal.

Merge approved.

review: Approve

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