Linaro GCC

Code review comment for lp:~uweigand/gcc-linaro/neon-extendsidi-4.7

  1. neon-extendsidi-4.7
  2. Merge into 4.7
Revision history for this message
Michael Hope (michaelh1) wrote :

cbuild successfully built this on armv7l-natty-cbuild288-ursa3-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr114975~ams-codesourcery~neon-extendsidi-4.7/logs/armv7l-natty-cbuild288-ursa3-cortexa9r1

-PASS: gcc.dg/di-sync-multithread.c (test for excess errors)
-PASS: gcc.dg/di-sync-multithread.c execution test
+FAIL: gcc.dg/di-sync-multithread.c (test for excess errors)
+UNRESOLVED: gcc.dg/di-sync-multithread.c compilation failed to produce executable
-FAIL: gcc.target/arm/combine-movs.c scan-assembler movs\tr[0-9]
+PASS: gcc.target/arm/combine-movs.c scan-assembler movs\tr[0-9]
+PASS: gcc.target/arm/neon-extend-1.c (test for excess errors)
+PASS: gcc.target/arm/neon-extend-1.c scan-assembler vdup.32
+PASS: gcc.target/arm/neon-extend-1.c scan-assembler vshr.u64
+PASS: gcc.target/arm/neon-extend-2.c (test for excess errors)
+PASS: gcc.target/arm/neon-extend-2.c scan-assembler vdup.32
+PASS: gcc.target/arm/neon-extend-2.c scan-assembler vshr.s64
-PASS: gcc.target/arm/pr43137.c scan-assembler-not mov\tr1, r[1-9]
+FAIL: gcc.target/arm/pr43137.c scan-assembler-not mov\tr1, r[1-9]
+PASS: gcc.target/arm/thumb-16bit-ops.c (test for excess errors)
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler add\tr0, r0, #256
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler add\tr0, r1, #8
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r0, #255
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r1, #7
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asr\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asrs\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asrs\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsl\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsls\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsls\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsr\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsrs\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsrs\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mov\tr0, #256
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mov\tr0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler movs\tr0, #255
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler muls\tr0, r1, r0
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mvns\tr0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler negs\tr0, r1
+PASS: gcc.target/arm/thumb-ifcvt.c (test for excess errors)
+PASS: gcc.target/arm/thumb-ifcvt.c scan-assembler asrne
+PASS: gcc.target/arm/thumb-ifcvt.c scan-assembler lslne

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr114975~ams-codesourcery~neon-extendsidi-4.7/logs/armv7l-natty-cbuild288-ursa3-cortexa9r1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.7+bzr114975~ams-codesourcery~neon-extendsidi-4.7/logs/armv7l-natty-cbuild288-ursa3-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild288-ursa3-cortexa9r1

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