Code review comment for lp:~raof/mir/fix-threaded-dispatcher-death-test-race

Store is sequence-before write(fd), and poll will return after (but not necessarily order-after) write(fd), guaranteeing that the store() is order-before load().

So I *think* the std::atomic bridges between the runtime instruction ordering we know this to have and the C++ memory model.

(On consideration, I'm not sure whether the compiler is free to reorder the store and the call to write(fd). But in the absence of a memory barrier the CPU is free to grab the pre-store value from memory. We could try this on Andreas' multi-socket box!)