Code review comment for ~rafaeldtinoco/ubuntu/+source/qemu:lp1805256-bionic-refix

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Rafael David Tinoco (rafaeldtinoco) wrote :

Oh, in the beginning I did test with:

Architecture: aarch64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 24
On-line CPU(s) list: 0-23
Thread(s) per core: 1
Core(s) per socket: 2
Socket(s): 12
NUMA node(s): 1
Vendor ID: ARM
Model: 4
Model name: Cortex-A53
Stepping: r0p4
BogoMIPS: 200.00
L1d cache: 768 KiB
L1i cache: 768 KiB
L2 cache: 3 MiB
L3 cache: 4 MiB
NUMA node0 CPU(s): 0-23
Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid

and using armhf guests from it.. but iirc the issue only happened in machines with more than 1 socket (likely because of internal - to CPU - cache invalidation protocols and the barrier instructions enforcing). All our aarch64 machines had more than 1 socket but did not support aarch32 kvm mode.

Let me know your findings! Thanks!

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