Merge ~paelzer/ubuntu/+source/qemu:fix-1832622-ppc-spectre-disco into ubuntu/+source/qemu:ubuntu/disco-devel

Proposed by Christian Ehrhardt  on 2019-06-13
Status: Merged
Approved by: Christian Ehrhardt  on 2019-06-26
Approved revision: f5ccfa81ec89a89e7f7f3f7d5fe41a4f02b32c38
Merge reported by: Christian Ehrhardt 
Merged at revision: fac417ed7d848ba91926c7421c8c4621c32fccab
Proposed branch: ~paelzer/ubuntu/+source/qemu:fix-1832622-ppc-spectre-disco
Merge into: ubuntu/+source/qemu:ubuntu/disco-devel
Diff against target: 412 lines (+384/-0)
4 files modified
debian/changelog (+7/-0)
debian/patches/series (+2/-0)
debian/patches/ubuntu/lp-1832622-0002-target-ppc-spapr-Add-workaround-option-to-SPAPR_CAP_.patch (+159/-0)
debian/patches/ubuntu/lp-1832622-0004-target-ppc-spapr-Add-SPAPR_CAP_CCF_ASSIST.patch (+216/-0)
Reviewer Review Type Date Requested Status
Rafael David Tinoco 2019-06-13 Approve on 2019-06-26
Canonical Server packageset reviewers 2019-06-13 Pending
Ubuntu Server Dev import team 2019-06-13 Pending
Review via email: mp+368749@code.launchpad.net
To post a comment you must log in.
Christian Ehrhardt  (paelzer) wrote :

Related test PPA at [1].
This started with the provided backports for 2.11 and then one by one taking away changes no more needed on the backports. The commits that "undo some backports" are intentionally not squashed so one can see what changes in between the versions and what is the same.

[1]: https://launchpad.net/~paelzer/+archive/ubuntu/bug-1832622-qemu-spectre-ppc

Paride Legovini (legovini) wrote :

Looks good from a formal point view; the packages in the PPA seem to be working as expected, however I don't think I can test the specific fix.

Rafael David Tinoco (rafaeldtinoco) wrote :

I did a full bionic review into eoan merge request:

https://code.launchpad.net/~paelzer/ubuntu/+source/qemu/+git/qemu/+merge/368748/comments/964720

All others are a subset of that, I did a quick look and compilation tests only.

+1 from me.

review: Approve
Christian Ehrhardt  (paelzer) wrote :

This migrated, closing forgotten MP

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diff --git a/debian/changelog b/debian/changelog
index bb2e787..4006062 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,10 @@
1qemu (1:3.1+dfsg-2ubuntu3.4) disco; urgency=medium
2
3 * d/p/ubuntu/lp-1832622-*: count cache flush Spectre v2 mitigation for ppc64
4 (LP: #1832622)
5
6 -- Christian Ehrhardt <christian.ehrhardt@canonical.com> Thu, 13 Jun 2019 08:40:55 +0200
7
1qemu (1:3.1+dfsg-2ubuntu3.3) disco; urgency=medium8qemu (1:3.1+dfsg-2ubuntu3.3) disco; urgency=medium
29
3 [ Christian Ehrhardt ]10 [ Christian Ehrhardt ]
diff --git a/debian/patches/series b/debian/patches/series
index f8a7ef6..bbbd749 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -31,3 +31,5 @@ ubuntu/lp1828495-0012-arch-capabilities-migratable.patch
31ubuntu/lp1828495-0014-remove-cpuid-pconfig.patch31ubuntu/lp1828495-0014-remove-cpuid-pconfig.patch
32ubuntu/lp1828495-0015-remove-cpuid-intel_pt.patch32ubuntu/lp1828495-0015-remove-cpuid-intel_pt.patch
33ubuntu/lp1828495-0016-no-ospke-on-some.patch33ubuntu/lp1828495-0016-no-ospke-on-some.patch
34ubuntu/lp-1832622-0002-target-ppc-spapr-Add-workaround-option-to-SPAPR_CAP_.patch
35ubuntu/lp-1832622-0004-target-ppc-spapr-Add-SPAPR_CAP_CCF_ASSIST.patch
diff --git a/debian/patches/ubuntu/lp-1832622-0002-target-ppc-spapr-Add-workaround-option-to-SPAPR_CAP_.patch b/debian/patches/ubuntu/lp-1832622-0002-target-ppc-spapr-Add-workaround-option-to-SPAPR_CAP_.patch
34new file mode 10064436new file mode 100644
index 0000000..58b3e88
--- /dev/null
+++ b/debian/patches/ubuntu/lp-1832622-0002-target-ppc-spapr-Add-workaround-option-to-SPAPR_CAP_.patch
@@ -0,0 +1,159 @@
1From 399b2896d4948a1ec0278d896ea3a561df768d64 Mon Sep 17 00:00:00 2001
2From: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
3Date: Fri, 1 Mar 2019 14:19:11 +1100
4Subject: [PATCH 1/2] target/ppc/spapr: Add workaround option to SPAPR_CAP_IBS
5
6The spapr_cap SPAPR_CAP_IBS is used to indicate the level of capability
7for mitigations for indirect branch speculation. Currently the available
8values are broken (default), fixed-ibs (fixed by serialising indirect
9branches) and fixed-ccd (fixed by diabling the count cache).
10
11Introduce a new value for this capability denoted workaround, meaning that
12software can work around the issue by flushing the count cache on
13context switch. This option is available if the hypervisor sets the
14H_CPU_BEHAV_FLUSH_COUNT_CACHE flag in the cpu behaviours returned from
15the KVM_PPC_GET_CPU_CHAR ioctl.
16
17Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
18Message-Id: <20190301031912.28809-1-sjitindarsingh@gmail.com>
19Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
20
21Origin: upstream, https://git.qemu.org/?p=qemu.git;a=commit;h=399b2896d4948a1ec0278d896ea3a561df768d64
22Bug-Ubuntu: https://bugs.launchpad.net/bugs/1832622
23Last-Update: 2019-06-13
24
25---
26 hw/ppc/spapr_caps.c | 21 ++++++++++-----------
27 hw/ppc/spapr_hcall.c | 5 +++++
28 include/hw/ppc/spapr.h | 7 +++++++
29 target/ppc/kvm.c | 8 +++++++-
30 4 files changed, 29 insertions(+), 12 deletions(-)
31
32diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
33index faab472d06..ca35b5153d 100644
34--- a/hw/ppc/spapr_caps.c
35+++ b/hw/ppc/spapr_caps.c
36@@ -276,11 +276,13 @@ static void cap_safe_bounds_check_apply(sPAPRMachineState *spapr, uint8_t val,
37 }
38
39 sPAPRCapPossible cap_ibs_possible = {
40- .num = 4,
41+ .num = 5,
42 /* Note workaround only maintained for compatibility */
43- .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd"},
44- .help = "broken - no protection, fixed-ibs - indirect branch serialisation,"
45- " fixed-ccd - cache count disabled",
46+ .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
47+ .help = "broken - no protection, workaround - count cache flush"
48+ ", fixed-ibs - indirect branch serialisation,"
49+ " fixed-ccd - cache count disabled,"
50+ " fixed-na - fixed in hardware (no longer applicable)",
51 };
52
53 static void cap_safe_indirect_branch_apply(sPAPRMachineState *spapr,
54@@ -288,15 +290,11 @@ static void cap_safe_indirect_branch_apply(sPAPRMachineState *spapr,
55 {
56 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
57
58- if (val == SPAPR_CAP_WORKAROUND) { /* Can only be Broken or Fixed */
59- error_setg(errp,
60-"Requested safe indirect branch capability level \"workaround\" not valid, try cap-ibs=%s",
61- cap_ibs_possible.vals[kvm_val]);
62- } else if (tcg_enabled() && val) {
63+ if (tcg_enabled() && val) {
64 /* TODO - for now only allow broken for TCG */
65 error_setg(errp,
66 "Requested safe indirect branch capability level not supported by tcg, try a different value for cap-ibs");
67- } else if (kvm_enabled() && val && (val != kvm_val)) {
68+ } else if (kvm_enabled() && (val > kvm_val)) {
69 error_setg(errp,
70 "Requested safe indirect branch capability level not supported by kvm, try cap-ibs=%s",
71 cap_ibs_possible.vals[kvm_val]);
72@@ -494,7 +492,8 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
73 [SPAPR_CAP_IBS] = {
74 .name = "ibs",
75 .description =
76- "Indirect Branch Speculation (broken, fixed-ibs, fixed-ccd)",
77+ "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
78+ "fixed-ccd, fixed-na)",
79 .index = SPAPR_CAP_IBS,
80 .get = spapr_cap_get_string,
81 .set = spapr_cap_set_string,
82diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
83index 476bad6271..4aa8036fc0 100644
84--- a/hw/ppc/spapr_hcall.c
85+++ b/hw/ppc/spapr_hcall.c
86@@ -1723,12 +1723,17 @@ static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu,
87 }
88
89 switch (safe_indirect_branch) {
90+ case SPAPR_CAP_FIXED_NA:
91+ break;
92 case SPAPR_CAP_FIXED_CCD:
93 characteristics |= H_CPU_CHAR_CACHE_COUNT_DIS;
94 break;
95 case SPAPR_CAP_FIXED_IBS:
96 characteristics |= H_CPU_CHAR_BCCTRL_SERIALISED;
97 break;
98+ case SPAPR_CAP_WORKAROUND:
99+ behaviour |= H_CPU_BEHAV_FLUSH_COUNT_CACHE;
100+ break;
101 default: /* broken */
102 assert(safe_indirect_branch == SPAPR_CAP_BROKEN);
103 break;
104diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
105index 8efc5e0779..a7f3b1bfdd 100644
106--- a/include/hw/ppc/spapr.h
107+++ b/include/hw/ppc/spapr.h
108@@ -85,12 +85,17 @@ typedef enum {
109 /* Bool Caps */
110 #define SPAPR_CAP_OFF 0x00
111 #define SPAPR_CAP_ON 0x01
112+
113 /* Custom Caps */
114+
115+/* Generic */
116 #define SPAPR_CAP_BROKEN 0x00
117 #define SPAPR_CAP_WORKAROUND 0x01
118 #define SPAPR_CAP_FIXED 0x02
119+/* SPAPR_CAP_IBS (cap-ibs) */
120 #define SPAPR_CAP_FIXED_IBS 0x02
121 #define SPAPR_CAP_FIXED_CCD 0x03
122+#define SPAPR_CAP_FIXED_NA 0x10 /* Lets leave a bit of a gap... */
123
124 typedef struct sPAPRCapabilities sPAPRCapabilities;
125 struct sPAPRCapabilities {
126@@ -339,9 +344,11 @@ struct sPAPRMachineState {
127 #define H_CPU_CHAR_HON_BRANCH_HINTS PPC_BIT(5)
128 #define H_CPU_CHAR_THR_RECONF_TRIG PPC_BIT(6)
129 #define H_CPU_CHAR_CACHE_COUNT_DIS PPC_BIT(7)
130+#define H_CPU_CHAR_BCCTR_FLUSH_ASSIST PPC_BIT(9)
131 #define H_CPU_BEHAV_FAVOUR_SECURITY PPC_BIT(0)
132 #define H_CPU_BEHAV_L1D_FLUSH_PR PPC_BIT(1)
133 #define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR PPC_BIT(2)
134+#define H_CPU_BEHAV_FLUSH_COUNT_CACHE PPC_BIT(5)
135
136 /* Each control block has to be on a 4K boundary */
137 #define H_CB_ALIGNMENT 4096
138diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
139index f0f5bf9391..4d46314276 100644
140--- a/target/ppc/kvm.c
141+++ b/target/ppc/kvm.c
142@@ -2392,7 +2392,13 @@ static int parse_cap_ppc_safe_bounds_check(struct kvm_ppc_cpu_char c)
143
144 static int parse_cap_ppc_safe_indirect_branch(struct kvm_ppc_cpu_char c)
145 {
146- if (c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) {
147+ if ((~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_FLUSH_COUNT_CACHE) &&
148+ (~c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) &&
149+ (~c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED)) {
150+ return SPAPR_CAP_FIXED_NA;
151+ } else if (c.behaviour & c.behaviour_mask & H_CPU_BEHAV_FLUSH_COUNT_CACHE) {
152+ return SPAPR_CAP_WORKAROUND;
153+ } else if (c.character & c.character_mask & H_CPU_CHAR_CACHE_COUNT_DIS) {
154 return SPAPR_CAP_FIXED_CCD;
155 } else if (c.character & c.character_mask & H_CPU_CHAR_BCCTRL_SERIALISED) {
156 return SPAPR_CAP_FIXED_IBS;
157--
1582.21.0
159
diff --git a/debian/patches/ubuntu/lp-1832622-0004-target-ppc-spapr-Add-SPAPR_CAP_CCF_ASSIST.patch b/debian/patches/ubuntu/lp-1832622-0004-target-ppc-spapr-Add-SPAPR_CAP_CCF_ASSIST.patch
0new file mode 100644160new file mode 100644
index 0000000..3bc9541
--- /dev/null
+++ b/debian/patches/ubuntu/lp-1832622-0004-target-ppc-spapr-Add-SPAPR_CAP_CCF_ASSIST.patch
@@ -0,0 +1,216 @@
1From 77012c6029ae15328f04ddcb713f459cdacffef9 Mon Sep 17 00:00:00 2001
2From: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
3Date: Fri, 1 Mar 2019 14:19:12 +1100
4Subject: [PATCH] target/ppc/spapr: Add SPAPR_CAP_CCF_ASSIST
5
6Introduce a new spapr_cap SPAPR_CAP_CCF_ASSIST to be used to indicate
7the requirement for a hw-assisted version of the count cache flush
8workaround.
9
10The count cache flush workaround is a software workaround which can be
11used to flush the count cache on context switch. Some revisions of
12hardware may have a hardware accelerated flush, in which case the
13software flush can be shortened. This cap is used to set the
14availability of such hardware acceleration for the count cache flush
15routine.
16
17The availability of such hardware acceleration is indicated by the
18H_CPU_CHAR_BCCTR_FLUSH_ASSIST flag being set in the characteristics
19returned from the KVM_PPC_GET_CPU_CHAR ioctl.
20
21Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
22Message-Id: <20190301031912.28809-2-sjitindarsingh@gmail.com>
23[dwg: Small style fixes]
24
25Origin: backport, https://git.qemu.org/?p=qemu.git;a=commit;h=8ff43ee404d3e295839d1fd4e9e6571ca7a62a66
26Author: Christian Ehrhardt <christian.ehrhardt@canonical.com>
27Original-Author: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
28Bug-Ubuntu: https://bugs.launchpad.net/bugs/1832622
29Last-Update: 2019-06-13
30
31---
32 hw/ppc/spapr.c | 2 ++
33 hw/ppc/spapr_caps.c | 25 +++++++++++++++++++++++++
34 hw/ppc/spapr_hcall.c | 5 +++++
35 include/hw/ppc/spapr.h | 5 ++++-
36 target/ppc/kvm.c | 16 ++++++++++++++++
37 target/ppc/kvm_ppc.h | 6 ++++++
38 6 files changed, 58 insertions(+), 1 deletion(-)
39
40--- a/hw/ppc/spapr.c
41+++ b/hw/ppc/spapr.c
42@@ -1939,6 +1939,7 @@ static const VMStateDescription vmstate_
43 &vmstate_spapr_cap_ibs,
44 &vmstate_spapr_irq_map,
45 &vmstate_spapr_cap_nested_kvm_hv,
46+ &vmstate_spapr_cap_ccf_assist,
47 NULL
48 }
49 };
50@@ -3904,6 +3905,7 @@ static void spapr_machine_class_init(Obj
51 smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
52 smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = 16; /* 64kiB */
53 smc->default_caps.caps[SPAPR_CAP_NESTED_KVM_HV] = SPAPR_CAP_OFF;
54+ smc->default_caps.caps[SPAPR_CAP_CCF_ASSIST] = SPAPR_CAP_OFF;
55 spapr_caps_add_properties(smc, &error_abort);
56 smc->irq = &spapr_irq_xics;
57 }
58--- a/hw/ppc/spapr_caps.c
59+++ b/hw/ppc/spapr_caps.c
60@@ -388,6 +388,21 @@ static void cap_nested_kvm_hv_apply(sPAP
61 }
62 }
63
64+static void cap_ccf_assist_apply(sPAPRMachineState *spapr, uint8_t val,
65+ Error **errp)
66+{
67+ uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
68+
69+ if (tcg_enabled() && val) {
70+ /* TODO - for now only allow broken for TCG */
71+ error_setg(errp,
72+"Requested count cache flush assist capability level not supported by tcg, try cap-ccf-assist=off");
73+ } else if (kvm_enabled() && (val > kvm_val)) {
74+ error_setg(errp,
75+"Requested count cache flush assist capability level not supported by kvm, try cap-ccf-assist=off");
76+ }
77+}
78+
79 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
80 [SPAPR_CAP_HTM] = {
81 .name = "htm",
82@@ -467,6 +482,15 @@ sPAPRCapabilityInfo capability_table[SPA
83 .type = "bool",
84 .apply = cap_nested_kvm_hv_apply,
85 },
86+ [SPAPR_CAP_CCF_ASSIST] = {
87+ .name = "ccf-assist",
88+ .description = "Count Cache Flush Assist via HW Instruction",
89+ .index = SPAPR_CAP_CCF_ASSIST,
90+ .get = spapr_cap_get_bool,
91+ .set = spapr_cap_set_bool,
92+ .type = "bool",
93+ .apply = cap_ccf_assist_apply,
94+ },
95 };
96
97 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr,
98@@ -595,6 +619,7 @@ SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC
99 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
100 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
101 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
102+SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
103
104 void spapr_caps_init(sPAPRMachineState *spapr)
105 {
106--- a/hw/ppc/spapr_hcall.c
107+++ b/hw/ppc/spapr_hcall.c
108@@ -1674,6 +1674,8 @@ static target_ulong h_get_cpu_characteri
109 uint8_t safe_cache = spapr_get_cap(spapr, SPAPR_CAP_CFPC);
110 uint8_t safe_bounds_check = spapr_get_cap(spapr, SPAPR_CAP_SBBC);
111 uint8_t safe_indirect_branch = spapr_get_cap(spapr, SPAPR_CAP_IBS);
112+ uint8_t count_cache_flush_assist = spapr_get_cap(spapr,
113+ SPAPR_CAP_CCF_ASSIST);
114
115 switch (safe_cache) {
116 case SPAPR_CAP_WORKAROUND:
117@@ -1714,6 +1716,9 @@ static target_ulong h_get_cpu_characteri
118 break;
119 case SPAPR_CAP_WORKAROUND:
120 behaviour |= H_CPU_BEHAV_FLUSH_COUNT_CACHE;
121+ if (count_cache_flush_assist) {
122+ characteristics |= H_CPU_CHAR_BCCTR_FLUSH_ASSIST;
123+ }
124 break;
125 default: /* broken */
126 assert(safe_indirect_branch == SPAPR_CAP_BROKEN);
127--- a/include/hw/ppc/spapr.h
128+++ b/include/hw/ppc/spapr.h
129@@ -72,8 +72,10 @@ typedef enum {
130 #define SPAPR_CAP_HPT_MAXPAGESIZE 0x06
131 /* Nested KVM-HV */
132 #define SPAPR_CAP_NESTED_KVM_HV 0x07
133+/* Count Cache Flush Assist HW Instruction */
134+#define SPAPR_CAP_CCF_ASSIST 0x08
135 /* Num Caps */
136-#define SPAPR_CAP_NUM (SPAPR_CAP_NESTED_KVM_HV + 1)
137+#define SPAPR_CAP_NUM (SPAPR_CAP_CCF_ASSIST + 1)
138
139 /*
140 * Capability Values
141@@ -801,6 +803,7 @@ extern const VMStateDescription vmstate_
142 extern const VMStateDescription vmstate_spapr_cap_sbbc;
143 extern const VMStateDescription vmstate_spapr_cap_ibs;
144 extern const VMStateDescription vmstate_spapr_cap_nested_kvm_hv;
145+extern const VMStateDescription vmstate_spapr_cap_ccf_assist;
146
147 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap)
148 {
149--- a/target/ppc/kvm.c
150+++ b/target/ppc/kvm.c
151@@ -91,6 +91,7 @@ static int cap_ppc_pvr_compat;
152 static int cap_ppc_safe_cache;
153 static int cap_ppc_safe_bounds_check;
154 static int cap_ppc_safe_indirect_branch;
155+static int cap_ppc_count_cache_flush_assist;
156 static int cap_ppc_nested_kvm_hv;
157
158 static uint32_t debug_inst_opcode;
159@@ -2391,6 +2392,14 @@ static int parse_cap_ppc_safe_indirect_b
160 return 0;
161 }
162
163+static int parse_cap_ppc_count_cache_flush_assist(struct kvm_ppc_cpu_char c)
164+{
165+ if (c.character & c.character_mask & H_CPU_CHAR_BCCTR_FLUSH_ASSIST) {
166+ return 1;
167+ }
168+ return 0;
169+}
170+
171 static void kvmppc_get_cpu_characteristics(KVMState *s)
172 {
173 struct kvm_ppc_cpu_char c;
174@@ -2413,6 +2422,8 @@ static void kvmppc_get_cpu_characteristi
175 cap_ppc_safe_cache = parse_cap_ppc_safe_cache(c);
176 cap_ppc_safe_bounds_check = parse_cap_ppc_safe_bounds_check(c);
177 cap_ppc_safe_indirect_branch = parse_cap_ppc_safe_indirect_branch(c);
178+ cap_ppc_count_cache_flush_assist =
179+ parse_cap_ppc_count_cache_flush_assist(c);
180 }
181
182 int kvmppc_get_cap_safe_cache(void)
183@@ -2430,6 +2441,11 @@ int kvmppc_get_cap_safe_indirect_branch(
184 return cap_ppc_safe_indirect_branch;
185 }
186
187+int kvmppc_get_cap_count_cache_flush_assist(void)
188+{
189+ return cap_ppc_count_cache_flush_assist;
190+}
191+
192 bool kvmppc_has_cap_nested_kvm_hv(void)
193 {
194 return !!cap_ppc_nested_kvm_hv;
195--- a/target/ppc/kvm_ppc.h
196+++ b/target/ppc/kvm_ppc.h
197@@ -62,6 +62,7 @@ bool kvmppc_has_cap_mmu_hash_v3(void);
198 int kvmppc_get_cap_safe_cache(void);
199 int kvmppc_get_cap_safe_bounds_check(void);
200 int kvmppc_get_cap_safe_indirect_branch(void);
201+int kvmppc_get_cap_count_cache_flush_assist(void);
202 bool kvmppc_has_cap_nested_kvm_hv(void);
203 int kvmppc_set_cap_nested_kvm_hv(int enable);
204 int kvmppc_enable_hwrng(void);
205@@ -321,6 +322,11 @@ static inline int kvmppc_get_cap_safe_in
206 {
207 return 0;
208 }
209+
210+static inline int kvmppc_get_cap_count_cache_flush_assist(void)
211+{
212+ return 0;
213+}
214
215 static inline bool kvmppc_has_cap_nested_kvm_hv(void)
216 {

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