Merge lp:~linaro-toolchain-dev/gcc-linaro/lp-803232 into lp:gcc-linaro/4.6

[Michael K. Edwards]

  Candidate patch for LP 803232

  ICE on code that uses vld4q_s16() NEON intrinsic

  The register allocator attempts to spill a structure containing a pair of
  int16x8_t's (total: 256 bits), for which there is no MODE_VECTOR_INT.
  (The ARM/NEON back end registers opaque holders > 128 bits wide as modes
  of class MODE_INT.) Work around this in choose_reload_regs() by calling
  smallest_mode_for_size() with MODE_INT instead of the real mode class if
  no mode in the class is wide enough.

[Linaro Toolchain Builder (cbuild)]

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cbuild-snapshot: gcc-linaro-4.6+bzr106764~m-k-edwards~lp-803232
cbuild-ancestor: lp:gcc-linaro/4.6+bzr106763
cbuild-state: check

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on x86_64-natty-cbuild144-oort1-x86_64r1.

The build results are available at:
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The test suite results were unchanged compared to the branch point lp:gcc-linaro/4.6+bzr106763.

The full testsuite results are at:
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cbuild-checked: x86_64-natty-cbuild144-oort1-x86_64r1

[Richard Sandiford (rsandifo)]

For the record, I think this is just a workaround. It isn't something
we'd apply to the branch.

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cbuild successfully built this on armv7l-natty-cbuild146-ursa1-cortexa9r1.

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The test suite results were unchanged compared to the branch point lp:gcc-linaro/4.6+bzr106763.

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106764~m-k-edwards~lp-803232/logs/armv7l-natty-cbuild146-ursa1-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild146-ursa1-cortexa9r1

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on armv7l-natty-cbuild146-ursa2-armv5r2.

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The test suite results were unchanged compared to the branch point lp:gcc-linaro/4.6+bzr106763.

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106764~m-k-edwards~lp-803232/logs/armv7l-natty-cbuild146-ursa2-armv5r2/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild146-ursa2-armv5r2

[Richard Sandiford (rsandifo)]

Fixed upstream by:

2011-07-07 Richard Sandiford <email address hidden>

 * reload1.c (choose_reload_regs): Use mode sizes to check whether
 an old reload register completely defines the required value.

We'll use that for the Linaro branches too.

Unmerged revisions

106764. By michaedw in build chroot <email address hidden> on 2011-06-30

Candidate patch for LP 803232

ICE on code that uses vld4q_s16() NEON intrinsic

The register allocator attempts to spill a structure containing a pair of
int16x8_t's (total: 256 bits), for which there is no MODE_VECTOR_INT.
(The ARM/NEON back end registers opaque holders > 128 bits wide as modes
of class MODE_INT.) Work around this in choose_reload_regs() by calling
smallest_mode_for_size() with MODE_INT instead of the real mode class if
no mode in the class is wide enough.

=== modified file 'ChangeLog.linaro'
--- ChangeLog.linaro	2011-06-28 12:02:27 +0000
+++ ChangeLog.linaro	2011-07-01 00:37:46 +0000
@@ -1,3 +1,10 @@
[phone]  Michael Edwards  <[e-mail]>
+
+	LP 803232
+	gcc/
+	* reload1.c (choose_reload_regs): If none of the mode class's modes
+	are wide enough, try MODE_INT instead.
+
 2011-06-28  Ramana Radhakrishnan  <[e-mail]>
 
 	Backport from mainline.

=== modified file 'gcc/reload1.c'
--- gcc/reload1.c	2011-05-06 11:28:27 +0000
+++ gcc/reload1.c	2011-07-01 00:37:46 +0000
@@ -6464,11 +6464,25 @@
 		  if (byte == 0)
 		    need_mode = mode;
 		  else
-		    need_mode
-		      = smallest_mode_for_size
-		        (GET_MODE_BITSIZE (mode) + byte * BITS_PER_UNIT,
-			 GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
-			 ? MODE_INT : GET_MODE_CLASS (mode));
+		    {
+		      unsigned int msize
+			= GET_MODE_BITSIZE (mode) + byte * BITS_PER_UNIT;
+		      enum mode_class mclass
+			= (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
+			  ? MODE_INT : GET_MODE_CLASS (mode);
+		      if (mclass != MODE_INT)
+			{
+			  enum machine_mode tmpmode;
+			  for (tmpmode = GET_CLASS_NARROWEST_MODE (mclass);
+			       tmpmode != VOIDmode;
+			       tmpmode = GET_MODE_WIDER_MODE (tmpmode))
+			    if (GET_MODE_PRECISION (mode) >= msize)
+			      break;
+			  if (tmpmode == VOIDmode)
+			    mclass = MODE_INT;
+			}
+		      need_mode = smallest_mode_for_size (msize, mclass);
+		    }
 
 		  if ((GET_MODE_SIZE (GET_MODE (last_reg))
 		       >= GET_MODE_SIZE (need_mode))