Mir

Code review comment for lp:~kdub/mir/fix-1378326

Revision history for this message
Cemil Azizoglu (cemil-azizoglu) wrote :

I think it's okay, but there is one minor concern. Some GPUs are severely bandwidth-bound. Clearing the whole region would result in a lot of pixels being pushed out. So even though clearing the whole buffer is convenient, it may cause performance issues.

OTOH, usually these bandwidth-bound GPUs have (much smaller) "tile status" buffers. When a full surface is cleared, the tile status buffers get cleared to reflect that, and the buffer is not really written to with millions of pixels. But if you selectively clear partial rectangles, then the tile status buffers are not used and actual clear operation takes place.

So paradoxically, on these architectures at least, clearing the whole buffer would be much faster.

Anyways, if there are issues in the future, this should be easy to change.

review: Approve

« Back to merge proposal