Merge lp:~eres/gcc-linaro/sms_fix_mem_dep-4.6 into lp:gcc-linaro/4.6

[Revital Eres]

SMS patch backport from mainline:

http://gcc.gnu.org/ml/gcc-cvs/2011-06/msg00579.html

http://gcc.gnu.org/ml/gcc-patches/2011-06/msg00960.html

[Linaro Toolchain Builder (cbuild)]

cbuild has taken a snapshot of this branch at r106767 and queued it for build.

The snapshot is available at:
 http://ex.seabright.co.nz/snapshots/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6.tar.xdelta3.xz

and will be built on the following builders:
 a9-builder armv5-builder i686 x86_64

You can track the build queue at:
 http://ex.seabright.co.nz/helpers/scheduler

cbuild-snapshot: gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6
cbuild-ancestor: lp:gcc-linaro/4.6+bzr106766
cbuild-state: check

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on x86_64-natty-cbuild148-oort1-x86_64r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/x86_64-natty-cbuild148-oort1-x86_64r1

The test suite results changed compared to the branch point lp:gcc-linaro/4.6+bzr106766:
 +PASS: gcc.dg/sms-9.c execution test
 +PASS: gcc.dg/sms-9.c (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/x86_64-natty-cbuild148-oort1-x86_64r1/gcc-testsuite.txt

cbuild-checked: x86_64-natty-cbuild148-oort1-x86_64r1

[Ramana Radhakrishnan (ramana)]

The default bootstrap and test doesn't check sms. My understanding was that the original patches on FSF trunk made sure that trunk bootstrapped with SMS. Should we regularly bootstrap with SMS turned on ?

cheers
Ramana

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on armv7l-natty-cbuild148-ursa4-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/armv7l-natty-cbuild148-ursa4-cortexa9r1

The test suite results changed compared to the branch point lp:gcc-linaro/4.6+bzr106766:
 +PASS: gcc.dg/sms-9.c execution test
 +PASS: gcc.dg/sms-9.c (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/armv7l-natty-cbuild148-ursa4-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild148-ursa4-cortexa9r1

[Revital Eres (eres)]

> The default bootstrap and test doesn't check sms. My understanding was that
> the original patches on FSF trunk made sure that trunk bootstrapped with SMS.

Right, the patches sent upstream are tested on ARM machine using bootstrap with SMS flags enabled.

> Should we regularly bootstrap with SMS turned on ?

If we have spare resources then yes. Please note that I usually do bootstrap on 4 different flavors of ARM, configuring with and without the following two flags --with-arch=armv7-a --with-mode=thumb. Also, I'm currently looking into another bootstrap failure on ARM machine exposed in recent trunk so once that will be resolved we can consider this issue again.

[Michael Hope (michaelh1)]

It's straight forward to run certain configurations, say, once a week. Let me know how to do a SMS bootstrap and what FSF or Linaro branches you'd like done.

[Revital Eres (eres)]

> It's straight forward to run certain configurations, say, once a week. Let me
> know how to do a SMS bootstrap and what FSF or Linaro branches you'd like
> done.

This is the command to bootstrap with SMS flags:

make -j 2 bootstrap BOOT_CFLAGS="-O2 -fmodulo-sched -fmodulo-sched-allow-regmoves -fno-auto-inc-dec --param sms-min-sc=1"

I would prefer to test FSF trunk with the following configuration options: (I'm usually testing only c language)

--enable-checking --enable-bootstrap --enable-languages=c [--with-mode=thumb --with-arch=armv7-a]

Thanks,
Revital

[Michael Hope (michaelh1)]

I've added support for building a SMS variant and have the latest gcc-linaro-4.6 and gcc trunk to build once a week on all hosts.

I've spawned a test run. The results should appear here:
 http://ex.seabright.co.nz/build/gcc-4.7~svn175904%5Esms/

We'll also be able to diff between the plain bootstrap and SMS bootstrap to check for introduced errors.

[Revital Eres (eres)]

> I've spawned a test run. The results should appear here:
> http://ex.seabright.co.nz/build/gcc-4.7~svn175904%5Esms/
>
Thanks.

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on armv7l-natty-cbuild149-ursa3-armv5r2.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/armv7l-natty-cbuild149-ursa3-armv5r2

The test suite results changed compared to the branch point lp:gcc-linaro/4.6+bzr106766:
 +PASS: gcc.dg/sms-9.c execution test
 +PASS: gcc.dg/sms-9.c (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106767~eres~sms_fix_mem_dep-4.6/logs/armv7l-natty-cbuild149-ursa3-armv5r2/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild149-ursa3-armv5r2

[Richard Sandiford (rsandifo)]

OK. When you do the merge, could you add something to the changelog to
say that it's a backport from mainline?

review: Approve

[Revital Eres (eres)]

> OK. When you do the merge, could you add something to the changelog to
> say that it's a backport from mainline?

Sure, I will do that.

=== modified file 'ChangeLog.linaro'
--- ChangeLog.linaro	2011-07-03 09:08:14 +0000
+++ ChangeLog.linaro	2011-07-04 11:11:57 +0000
@@ -1,3 +1,12 @@
[phone]  Revital Eres  <[e-mail]>
+
+	gcc/
+	* ddg.c (add_intra_loop_mem_dep): New function.
+	(build_intra_loop_deps): Call it.
+
+	gcc/testsuite
+	* gcc.dg/sms-9.c: New file.
+
 2011-07-03  Ira Rosen  <[e-mail]>
 
 	Backport from FSF:
 
=== modified file 'gcc/ddg.c'
--- gcc/ddg.c	2011-05-13 16:03:40 +0000
+++ gcc/ddg.c	2011-07-04 11:11:57 +0000
@@ -390,6 +390,33 @@
 			 &PATTERN (insn2));
 }
 
+/* Given two nodes, analyze their RTL insns and add intra-loop mem deps
+   to ddg G.  */
+static void
+add_intra_loop_mem_dep (ddg_ptr g, ddg_node_ptr from, ddg_node_ptr to)
+{
+
+  if ((from->cuid == to->cuid)
+      || !insns_may_alias_p (from->insn, to->insn))
+    /* Do not create edge if memory references have disjoint alias sets
+       or 'to' and 'from' are the same instruction.  */
+    return;
+
+  if (mem_write_insn_p (from->insn))
+    {
+      if (mem_read_insn_p (to->insn))
+	create_ddg_dep_no_link (g, from, to,
+				DEBUG_INSN_P (to->insn)
+				? ANTI_DEP : TRUE_DEP, MEM_DEP, 0);
+      else
+	create_ddg_dep_no_link (g, from, to,
+				DEBUG_INSN_P (to->insn)
+				? ANTI_DEP : OUTPUT_DEP, MEM_DEP, 0);
+    }
+  else if (!mem_read_insn_p (to->insn))
+    create_ddg_dep_no_link (g, from, to, ANTI_DEP, MEM_DEP, 0);
+}
+
 /* Given two nodes, analyze their RTL insns and add inter-loop mem deps
    to ddg G.  */
 static void
@@ -477,10 +504,22 @@
 	      if (DEBUG_INSN_P (j_node->insn))
 		continue;
 	      if (mem_access_insn_p (j_node->insn))
- 		/* Don't bother calculating inter-loop dep if an intra-loop dep
-		   already exists.  */
+		{
+		  /* Don't bother calculating inter-loop dep if an intra-loop dep
+		     already exists.  */
 	      	  if (! TEST_BIT (dest_node->successors, j))
 		    add_inter_loop_mem_dep (g, dest_node, j_node);
+		  /* If -fmodulo-sched-allow-regmoves
+		     is set certain anti-dep edges are not created.
+		     It might be that these anti-dep edges are on the
+		     path from one memory instruction to another such that
+		     removing these edges could cause a violation of the
+		     memory dependencies.  Thus we add intra edges between
+		     every two memory instructions in this case.  */
+		  if (flag_modulo_sched_allow_regmoves
+		      && !TEST_BIT (dest_node->predecessors, j))
+		    add_intra_loop_mem_dep (g, j_node, dest_node);
+		}
             }
         }
     }
 
=== added file 'gcc/testsuite/gcc.dg/sms-9.c'
--- gcc/testsuite/gcc.dg/sms-9.c	1970-01-01 00:00:00 +0000
+++ gcc/testsuite/gcc.dg/sms-9.c	2011-07-04 11:11:57 +0000
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fmodulo-sched -fno-auto-inc-dec -O2 -fmodulo-sched-allow-regmoves" } */
+
+#include <stdlib.h>
+#include <stdarg.h>
+
+struct df_ref_info
+{
+  unsigned int *begin;
+  unsigned int *count;
+};
+
+extern void *memset (void *s, int c, __SIZE_TYPE__ n);
+
+
+__attribute__ ((noinline))
+     int
+     df_reorganize_refs_by_reg_by_insn (struct df_ref_info *ref_info,
+					int num, unsigned int start)
+{
+  unsigned int m = num;
+  unsigned int offset = 77;
+  unsigned int r;
+
+  for (r = start; r < m; r++)
+    {
+      ref_info->begin[r] = offset;
+      offset += ref_info->count[r];
+      ref_info->count[r] = 0;
+    }
+
+  return offset;
+}
+
+int
+main ()
+{
+  struct df_ref_info temp;
+  int num = 100;
+  unsigned int start = 5;
+  int i, offset;
+
+  temp.begin = malloc (100 * sizeof (unsigned int));
+  temp.count = malloc (100 * sizeof (unsigned int));
+
+  memset (temp.begin, 0, sizeof (unsigned int) * num);
+  memset (temp.count, 0, sizeof (unsigned int) * num);
+
+  for (i = 0; i < num; i++)
+    temp.count[i] = i + 1;
+
+  offset = df_reorganize_refs_by_reg_by_insn (&temp, num, start);
+
+  if (offset != 5112)
+    abort ();
+
+  free (temp.begin);
+  free (temp.count);
+  return 0;
+}