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Branches
Name | Last Modified | Last Commit |
---|---|---|
ops/dwil/ |
2021-08-05 22:46:27 UTC |
CYAN_8R: temporary fix for initialization failing
Author:
Doug W
CYAN_8R: temporary fix for initialization failing When initializing the device, uhd will try to use tx hooks that |
ops/dwil/ |
2021-08-05 22:44:11 UTC |
CYAN_8R: temporary fix for initialization failing
Author:
Doug W
CYAN_8R: temporary fix for initialization failing When initializing the device, uhd will try to use tx hooks that |
ops/dwil/ |
2021-08-05 22:40:04 UTC |
DEBUG: figuring out where link_addr missing appears
Author:
Doug W
DEBUG: figuring out where link_addr missing appears |
ops/dwil/ |
2021-08-05 19:11:06 UTC |
RX_STREAM_INIT: improved help message
Author:
Doug W
RX_STREAM_INIT: improved help message |
ops/dwil/tmp_3 | 2021-08-05 18:12:26 UTC |
RX_STREAM_INIT: changed help message to avoid error
Author:
Doug W
RX_STREAM_INIT: changed help message to avoid error THe usr must specify a exec file starting with ./ ~/, or / for the exec, |
ops/dwil/tmp_2 | 2021-08-05 18:08:19 UTC |
RX_STREAM_INIT: changed help message to avoid error
Author:
Doug W
RX_STREAM_INIT: changed help message to avoid error THe usr must specify a exec file starting with ./ ~/, or / for the exec, |
ops/dwil/tmp_1 | 2021-08-05 16:19:01 UTC |
DEBUG: tracing where program failed
Author:
Doug W
DEBUG: tracing where program failed |
ops/dwil/ |
2021-08-04 21:54:05 UTC |
CYAN_4R4T: fixing mapping for rf gain
Author:
Doug W
CYAN_4R4T: fixing mapping for rf gain |
ops/dwil/8rf4r4t_4 | 2021-08-04 18:59:56 UTC |
CYAN_4R4T: removed gain setting logic from multi_usrp
Author:
Doug W
CYAN_4R4T: removed gain setting logic from multi_usrp Note this will affect every that uses multi_usrp, not just this unit |
ops/dwil/ |
2021-08-04 16:14:39 UTC |
CYAN_4R4T: removed commented out code that is no longer useful
Author:
Doug W
CYAN_4R4T: removed commented out code that is no longer useful |
ops/dwil/8rf4r4t_3 | 2021-07-27 21:31:24 UTC |
RX_STREAM_INIT: troubleshooting
Author:
Doug W
RX_STREAM_INIT: troubleshooting |
ops/dwil/8rf4r4t_2 | 2021-07-27 19:29:07 UTC |
RX_STREAM_INIT: implemented post exec
Author:
Doug W
RX_STREAM_INIT: implemented post exec |
ops/dwil/8rf4r4t | 2021-07-26 18:50:54 UTC |
RX_STREAM_INIT: renames setup_time to secs (start delay)
Author:
Doug W
RX_STREAM_INIT: renames setup_time to secs (start delay) |
ops/dwil/ |
2021-07-23 18:33:06 UTC |
CYAN_4R4T: removed debug messages
Author:
Doug W
CYAN_4R4T: removed debug messages |
ops/dwil/ |
2021-07-23 17:38:29 UTC |
DBUG: adding debug messages
Author:
Doug W
DBUG: adding debug messages |
ops/dwil/ |
2021-07-21 22:21:28 UTC |
CYAN_4R4T: changed set time to cur time
Author:
Doug W
CYAN_4R4T: changed set time to cur time |
ops/dwil/ |
2021-07-19 21:00:57 UTC |
EXAMPLE: fixing help message, squash this
Author:
Doug W
EXAMPLE: fixing help message, squash this |
ops/dwil/cyfcr_4r4t | 2021-07-16 18:25:05 UTC |
CYAN_4R4T: improved program flow
Author:
Doug W
CYAN_4R4T: improved program flow |
ops/dwil/ |
2021-07-06 18:53:36 UTC |
DEBUG: removed the crash used to test where number of samples sent was tracked
Author:
Doug W
DEBUG: removed the crash used to test where number of samples sent was tracked |
ops/dwil/ |
2021-06-25 16:46:21 UTC |
CYAN_4R4T: stopped 4R4T from turning off at the end of runs
Author:
Doug W
CYAN_4R4T: stopped 4R4T from turning off at the end of runs |
ops/dwil/pc8r-vvv | 2021-06-23 20:34:24 UTC |
EXAMPLES: made test_set_get_path_value not require synchronization
Author:
Doug W
EXAMPLES: made test_set_ |
ops/dwil/examining | 2021-06-22 17:32:42 UTC |
DEBUG: abort to check what the register values are
Author:
Doug W
DEBUG: abort to check what the register values are |
ops/dwil/ |
2021-06-21 15:46:28 UTC |
CYAN_8t: partially fixed the spec description
Author:
Doug W
CYAN_8t: partially fixed the spec description |
ops/dwil/ |
2021-06-17 21:10:20 UTC |
DEBUG: print messages
Author:
Doug W
DEBUG: print messages |
ops/dwil/ |
2021-06-16 19:48:24 UTC |
CYAN_8R: Fixing clocking and DSP frequencies.
Author:
Doug Wilson
CYAN_8R: Fixing clocking and DSP frequencies. |
ops/dwil/ |
2021-06-16 16:24:47 UTC |
CYAN_8R: Fixing clocking and DSP frequencies.
Author:
Jade (testbench)
CYAN_8R: Fixing clocking and DSP frequencies. |
ops/dwil/ |
2021-06-11 18:51:16 UTC |
Cyan_p1hdr32t: added it to tests
Author:
Jade (testbench)
Cyan_p1hdr32t: added it to tests |
rdb-maser- |
2021-05-28 15:00:11 UTC |
UHD: More printfs
Author:
Renaud Di Bernardo
UHD: More printfs |
uhd-rdb- |
2021-05-28 15:00:11 UTC |
UHD: More printfs
Author:
Renaud Di Bernardo
UHD: More printfs |
ops/jpol/cyan-test | 2021-03-02 19:49:24 UTC |
CYAN_P1HDR32T: update name of the device
Author:
John Polak
CYAN_P1HDR32T: update name of the device |
ops/ven/ |
2021-01-06 17:36:20 UTC |
fix typo
Author:
Vikram Venkataranan
fix typo |
ops/ven/ |
2020-12-11 16:35:39 UTC |
fix field names
Author:
Vikram Venkataramanan
fix field names |
test/single-uhd | 2020-10-29 21:30:51 UTC |
EXAMPLES: add channel mapping note to tx_waveforms for cyan
Author:
John Polak
EXAMPLES: add channel mapping note to tx_waveforms for cyan |
master-rtm1-testing | 2020-09-08 16:35:13 UTC |
BUFFERSIZE: Fixed buffer size to use DDR.
Author:
Renaud Di Bernardo
BUFFERSIZE: Fixed buffer size to use DDR. Changed the buffer size to it's actual size, and multiplied the level reported |
test/vvv/su-tng | 2020-09-02 18:44:39 UTC |
tests: cyan_64t: cyan_64t tests passing
Author:
Christopher Friedt
tests: cyan_64t: cyan_64t tests passing cyan_64t_test passing. With this, crimson_tng_test, and cyan_16t_test, Fixes #14 Signed-off-by: Christopher Friedt <chris. |
test/ci | 2020-08-27 02:26:31 UTC |
crimson_tng: fix crash in when mboard_eeprom["serial"] property does not exist
Author:
Christopher Friedt
crimson_tng: fix crash in when mboard_ This change populates the mboard_ Fixes #9 Signed-off-by: Christopher Friedt <chris. |
cfriedtpv-cyan-16t | 2020-08-18 14:43:02 UTC |
cyan_16t: platform is stable
Author:
Christopher Friedt
cyan_16t: platform is stable Previously, the master branch was being used as a product branch for crimson_tng. Since we do not intend to use product branches and would like master to support The same will be done for master-testing, which was being used as a Signed-off-by: Christopher Friedt <chris. |
cfriedtpv-cyan-64t | 2020-08-14 15:50:01 UTC |
Merge branch 'master' into cyan-64t
Author:
Christopher Friedt
Merge branch 'master' into cyan-64t |
ops/abav/ |
2020-04-21 00:45:44 UTC |
UHD: define a parameter for flow control set point
Author:
Amir Ghanbari Bavarsad
UHD: define a parameter for flow control set point |
ops/vvv/ |
2020-04-13 20:24:43 UTC |
Revert "TATE: Add aggregate SampRate consideration"
Author:
Amir Ghanbari Bavarsad
Revert "TATE: Add aggregate SampRate consideration" Mistakenly committed to the wrong branch |
test/fix-freq-dsp | 2020-03-11 22:24:36 UTC |
UHD: This addresses an incorrect doubling of freq.
Author:
SFEN
UHD: This addresses an incorrect doubling of freq. |
ops/vvv/ |
2020-03-11 16:29:09 UTC |
Merge branch 'master' of github.com:/pervices/uhd into ops/vvv/test-fulltx-fc
Author:
Victor W
Merge branch 'master' of github. |
master-rtm1 | 2020-01-21 16:55:47 UTC |
TATE VAUNT: Critical BugFix send packet size
Author:
Amir Ghanbari Bavarsad
TATE VAUNT: Critical BugFix send packet size Prior to this fix, the size of buffers were calculated incorrectly, |
test/master- |
2019-08-19 18:53:42 UTC |
TEST: Use only qSFP+ A for all channels.
Author:
Victor W
TEST: Use only qSFP+ A for all channels. |
master-fulltx | 2019-08-14 19:03:20 UTC |
UHD: Add additional TATE Tx end points.
Author:
Victor W
UHD: Add additional TATE Tx end points. |
ops/gshe/ci | 2019-06-27 20:24:36 UTC |
UHD CI: Added CI script for building UHD on the CI host computer
Author:
Gabe Sher
UHD CI: Added CI script for building UHD on the CI host computer |
rb/full-tx | 2018-10-06 18:25:28 UTC |
PIDC: Removing debug flag.
Author:
Victor W
PIDC: Removing debug flag. |
test/port | 2018-08-20 20:45:32 UTC |
Merge branch 'master' of github.com:/pervices/uhd into test/port
Author:
Victor W
Merge branch 'master' of github. |
dev/dmcl | 2018-05-03 17:27:09 UTC |
Dont send end of packet packets
Author:
Daniel McLean
Dont send end of packet packets |
master-old | 2018-03-13 16:06:19 UTC |
Merge pull request #109 from cfriedtpv/fix-bandwidth-issue
Author:
DanielMcLean
Merge pull request #109 from cfriedtpv/ fix bandwidth issue |
legacy/v1.6 | 2018-03-13 16:06:19 UTC |
Merge pull request #109 from cfriedtpv/fix-bandwidth-issue
Author:
DanielMcLean
Merge pull request #109 from cfriedtpv/ fix bandwidth issue |
test/full-tx-rate | 2017-11-21 17:29:23 UTC |
Merge branch 'master' of github.com:/pervices/uhd into test/full-tx-rate
Author:
Victor W
Merge branch 'master' of github. |
test/grc-loopback | 2017-10-30 16:31:24 UTC |
Send will now properly send 0 sample packet for start of burst if asked too
Author:
DanielMcLean
Send will now properly send 0 sample packet for start of burst if asked too |
kb/4201/ |
2017-10-20 14:06:34 UTC |
Further fixing instances where we only look at has_time_stamp. Fixing vita he...
Author:
Daniel McLean
Further fixing instances where we only look at has_time_stamp. Fixing vita header |
test/backpressure | 2017-10-19 18:16:33 UTC |
FC nonlinear print out bl, sr, dt
Author:
Daniel McLean
FC nonlinear print out bl, sr, dt |
test/10g-set-time | 2017-10-19 14:31:33 UTC |
Setting time now adjusts expected offset so PID doesnt go crazy
Author:
DanielMcLean
Setting time now adjusts expected offset so PID doesnt go crazy |
test/tx-send | 2017-08-31 14:20:35 UTC |
Merge pull request #78 from cfriedtpv/kb/4070/uhd-ensure-only-one-buffer-mana...
Author:
DanielMcLean
Merge pull request #78 from cfriedtpv/ Kb/4070/uhd ensure only one buffer management thread is running per process |
ops/dwil/ |
2017-08-22 20:25:23 UTC |
UHD: Now correctl using offset and doing trylock for fifo updatE
Author:
Daniel McLean
UHD: Now correctl using offset and doing trylock for fifo updatE |
test/rx-burst | 2017-08-22 20:25:23 UTC |
UHD: Now correctl using offset and doing trylock for fifo updatE
Author:
Daniel McLean
UHD: Now correctl using offset and doing trylock for fifo updatE |
test/tx-send-debug | 2017-06-22 15:04:00 UTC |
Adding debug messages
Author:
Daniel McLean
Adding debug messages |
cfriedtpv- |
2017-06-15 22:23:29 UTC |
Merge branch 'kb/4022/uhd-use-pulse-train-for-flow-control' of https://github...
Author:
Victor W
Merge branch 'kb/4022/ |
test/tx-send-vvv | 2017-05-31 17:59:37 UTC |
Merge pull request #52 from cfriedtpv/kb/3985/uhd-bug-reduce-delays-in-send
Author:
DanielMcLean
Merge pull request #52 from cfriedtpv/ Kb/3985/uhd bug reduce delays in send |
test/flowcontrol | 2017-05-19 13:02:12 UTC |
Merge pull request #42 from cfriedtpv/kb/3983/uhd-bug-set-sample-rate
Author:
DanielMcLean
Merge pull request #42 from cfriedtpv/ Kb/3983/uhd fix bug in set sample rate |
master- |
2016-10-18 16:09:46 UTC |
Vita Changes for master-classic-testing FPGA Image
Author:
Namburi Raghuram
Vita Changes for master- |
ops-ramfc | 2016-10-17 17:14:58 UTC |
Updating Crimson TNG device root name to differente from classic
Author:
Namburi Raghuram
Updating Crimson TNG device root name to differente from classic Necessity for OpenBTS |
master-rtm4-testing | 2016-10-17 17:14:58 UTC |
Updating Crimson TNG device root name to differente from classic
Author:
Namburi Raghuram
Updating Crimson TNG device root name to differente from classic Necessity for OpenBTS |
ops-ram | 2016-10-14 19:39:03 UTC |
Merge pull request #2 from pervices/ops-ram
Author:
vrnambur
Merge pull request #2 from pervices/ops-ram merging into pervices/uhd, master branch |
master-classic | 2016-10-14 19:39:03 UTC |
Merge pull request #2 from pervices/ops-ram
Author:
vrnambur
Merge pull request #2 from pervices/ops-ram merging into pervices/uhd, master branch |
master-classic-vita | 2016-10-05 16:45:29 UTC |
VITA bytes swapped for new FPGA image for crimson-classic
Author:
Cole Development Machine
VITA bytes swapped for new FPGA image for crimson-classic |
ops-ramobts | 2016-09-29 16:23:51 UTC |
OBTS: Latest openBTS with no flow control and disable stream hooks
Author:
Cole Development Machine
OBTS: Latest openBTS with no flow control and disable stream hooks Used with master branch OpenBTS. |
ops-obtsdev | 2016-08-09 22:45:35 UTC |
OBTS: Stream hook file tree path correction
Author:
Namburi Raghuram
OBTS: Stream hook file tree path correction |
pv-flowcntrl | 2016-06-30 22:05:07 UTC |
FLOWCONTROL: Fine-tuning Over/Under flow response
Author:
Namburi Raghuram
FLOWCONTROL: Fine-tuning Over/Under flow response Underflow flags are now set to true on init |
rfnoc-devel | 2014-11-07 14:29:10 UTC |
x300/rfnoc: Adjusted buffers on tx side
Author:
Martin
x300/rfnoc: Adjusted buffers on tx side |
maint | 2014-11-04 14:17:43 UTC |
x300: Fixed typo in io_impl
Author:
Martin
x300: Fixed typo in io_impl |
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