Merge lp:~ams-codesourcery/gcc-linaro/lp675347 into lp:gcc-linaro/4.5

[Andrew Stubbs]

This is the patch Julian Brown has committed upstream to fix bug #675347.

I've backported it to GCC 4.5.

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cbuild-snapshot: gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347
cbuild-state: check

[Linaro Toolchain Builder (cbuild)]

cbuild successfully built this on i686-lucid-cbuild93-scorpius-i686r1.

The build results are available at:
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review: Approve

[Linaro Toolchain Builder (cbuild)]

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review: Approve

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cbuild successfully built this on armv7l-maverick-cbuild93-ursa1-cortexa8r1.

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cbuild-checked: armv7l-maverick-cbuild93-ursa1-cortexa8r1

[Andrew Stubbs (ams-codesourcery)]

The test results show that this patch causes a segmentation fault in some of the tests:

FAIL: gcc.dg/pch/counter-1.c -O0 -g -I. (test for excess errors)
FAIL: gcc.dg/pch/counter-1.c -O2 -I. (test for excess errors)
FAIL: gcc.dg/pch/cpp-2.c -O0 -g -I. (test for excess errors)
FAIL: gcc.dg/pch/cpp-3.c -O3 -g -I. (test for warnings, line )
FAIL: gcc.dg/pch/cpp-3.c -O3 -g -I. (test for excess errors)
[and others ....]

review: Needs Fixing

[Andrew Stubbs (ams-codesourcery)]

These failures turn out to be random problems with the test scripts/hardware.

review: Approve

[Ira Rosen (irar)]

I am out of the office until 17/04/2011.

Note: This is an automated response to your message "Re: [Merge]
lp:~ams-codesourcery/gcc-linaro/lp675347 into lp:gcc-linaro" sent on
14/4/2011 14:23:42.

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=== modified file 'ChangeLog.linaro'
--- ChangeLog.linaro	2011-03-11 17:36:50 +0000
+++ ChangeLog.linaro	2011-03-23 13:14:50 +0000
@@ -1,3 +1,13 @@
[phone]  Andrew Stubbs  <[e-mail]>
+
+	Backport from FSF.
+
+	2011-03-23  Julian Brown  <[e-mail]>
+
+	gcc/
+	* expr.c (expand_expr_real_1): Only use BLKmode for volatile
+	accesses which are not naturally aligned.
+
 2011-03-10  Ramana Radhakrishnan  <[e-mail]>
 
 	LP:730440
 
=== modified file 'gcc/expr.c'
--- gcc/expr.c	2011-02-22 11:38:56 +0000
+++ gcc/expr.c	2011-03-23 13:14:50 +0000
@@ -9032,8 +9032,11 @@
 		&& modifier != EXPAND_CONST_ADDRESS
 		&& modifier != EXPAND_INITIALIZER)
 	    /* If the field is volatile, we always want an aligned
-	       access.  */
-	    || (volatilep && flag_strict_volatile_bitfields > 0)
+	       access.  Only do this if the access is not already naturally
+	       aligned, otherwise "normal" (non-bitfield) volatile fields
+	       become non-addressable.  */
+	    || (volatilep && flag_strict_volatile_bitfields > 0
+		&& (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
 	    /* If the field isn't aligned enough to fetch as a memref,
 	       fetch it as a bit field.  */
 	    || (mode1 != BLKmode