Ubuntu
linux-riscv package

~xnox/ubuntu/+source/linux-riscv/+git/hirsute:fixup-old-patches-v2

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  2. lp:~xnox/ubuntu/+source/linux-riscv/+git/hirsute
  3. fixup-old-patches-v2
Last commit made on 2021-04-01
Get this branch:
git clone -b fixup-old-patches-v2 https://git.launchpad.net/~xnox/ubuntu/+source/linux-riscv/+git/hirsute
Only Dimitri John Ledkov can upload to this branch. If you are Dimitri John Ledkov please log in for upload directions.

Branch merges

Branch information

Name:
fixup-old-patches-v2
Repository:
lp:~xnox/ubuntu/+source/linux-riscv/+git/hirsute

Recent commits

57611b6... by Yash Shah <email address hidden>

dt-bindings: gpio: Update DT binding docs to support SiFive FU740 SoC

Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.

Signed-off-by: Yash Shah <email address hidden>
Signed-off-by: Palmer Dabbelt <email address hidden>
(cherry picked from commit 42cf244c8f03cc8a801333fe2fa3b7efa760d119)
Signed-off-by: Dimitri John Ledkov <email address hidden>

8cd2dd7... by Yash Shah <email address hidden>

dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC

Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.

Signed-off-by: Yash Shah <email address hidden>
Signed-off-by: Palmer Dabbelt <email address hidden>
(cherry picked from commit b1f592d5c1e31dfa46a161c52740f3bff1b1e963)
Signed-off-by: Dimitri John Ledkov <email address hidden>

b7b4e48... by Yash Shah <email address hidden>

dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC

Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.

Signed-off-by: Yash Shah <email address hidden>
Signed-off-by: Palmer Dabbelt <email address hidden>
(cherry picked from commit 75e6d7248efccc2b13d0f3811b29d3e5cb04bcad)
Signed-off-by: Dimitri John Ledkov <email address hidden>

397c1ce... by Yash Shah <email address hidden>

RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740

SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.

Signed-off-by: Yash Shah <email address hidden>
Signed-off-by: Palmer Dabbelt <email address hidden>
(cherry picked from commit 507308b8ccc90d37b07bfca8ffe130435d6b354f)
BugLink: https://bugs.launchpad.net/bugs/1920916
Signed-off-by: Dimitri John Ledkov <email address hidden>

c71f928... by Yash Shah <email address hidden>

dt-bindings: riscv: Update l2 cache DT documentation to add support for SiFive FU740

The L2 cache controller in SiFive FU740 has 4 ECC interrupt sources as
compared to 3 in FU540. Update the DT documentation accordingly with
"compatible" and "interrupt" property changes.

Signed-off-by: Yash Shah <email address hidden>
Signed-off-by: Palmer Dabbelt <email address hidden>
(cherry picked from commit af951c3a113bc2cc0419e39f5752ca77f7ddf228)
Signed-off-by: Dimitri John Ledkov <email address hidden>

78e3412... by Dimitri John Ledkov

Revert "dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC"

This reverts commit dc2249586f1b9558f745e65d61a4b0e383ca1714.

Signed-off-by: Dimitri John Ledkov <email address hidden>

c4753d4... by Dimitri John Ledkov

Revert "RISC-V: Update l2 cache DT documentation to add support for SiFive FU740"

This reverts commit e8a04dd6d642cf1d2f7c6de0589c69305fa32deb.

Signed-off-by: Dimitri John Ledkov <email address hidden>

476163a... by Dimitri John Ledkov

Revert "RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740"

This reverts commit 5063de1bbb516d06347285ad2a65cd8a23c6e75a.

Signed-off-by: Dimitri John Ledkov <email address hidden>

b576dd6... by Andrea Righi

UBUNTU: Ubuntu-riscv-5.11.0-1004.4

Signed-off-by: Andrea Righi <email address hidden>

111fa84... by Andrea Righi

UBUNTU: Start new release

Ignore: yes
Signed-off-by: Andrea Righi <email address hidden>