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a77883a... by You-Sheng Yang on 2022-01-05

Bug 1956509: Enable AMD P-State

9c11d0f... by You-Sheng Yang on 2022-01-05

UBUNTU: [Config] enable X86_AMD_PSTATE on amd64

BugLink: https://bugs.launchpad.net/bugs/1956509

Signed-off-by: You-Sheng Yang <email address hidden>

a1e1bec... by Ray Huang on 2021-12-24

MAINTAINERS: Add AMD P-State driver maintainer entry

BugLink: https://bugs.launchpad.net/bugs/1956509

I will continue to add new feature and processor support, optimize the
performance, and handle the issues for AMD P-State driver.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(backported from commit 38fec059bb69793f38cfa7a671d4bdbfe2a647aa)
Signed-off-by: You-Sheng Yang <email address hidden>

4a2016b... by Ray Huang on 2021-12-24

Documentation: amd-pstate: Add AMD P-State driver introduction

BugLink: https://bugs.launchpad.net/bugs/1956509

Introduce the AMD P-State driver design and implementation.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit c22760885fd6f7161fabde8e7db63d7f085b125a)
Signed-off-by: You-Sheng Yang <email address hidden>

9b1fa65... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Add AMD P-State performance attributes

BugLink: https://bugs.launchpad.net/bugs/1956509

Introduce sysfs attributes to get the different level AMD P-State
performances.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit 3ad7fde16a04aa70df8a59cba99e225ef9adf42f)
Signed-off-by: You-Sheng Yang <email address hidden>

7897053... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Add AMD P-State frequencies attributes

BugLink: https://bugs.launchpad.net/bugs/1956509

Introduce sysfs attributes to get the different level processor
frequencies.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit ec4e3326a95507ea96fbad21b9472f5ba25500a7)
Signed-off-by: You-Sheng Yang <email address hidden>

24c1ea5... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Add boost mode support for AMD P-State

BugLink: https://bugs.launchpad.net/bugs/1956509

If the sbios supports the boost mode of AMD P-State, let's switch to
boost enabled by default.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit 41271016dfa4a08487bf2862f817edc9070489d1)
Signed-off-by: You-Sheng Yang <email address hidden>

fd49b40... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Add trace for AMD P-State module

BugLink: https://bugs.launchpad.net/bugs/1956509

Add trace event to monitor the performance value changes which is
controlled by cpu governors.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit 60e10f896dbf6d78f912e4972081bd4119131376)
Signed-off-by: You-Sheng Yang <email address hidden>

231fca5... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Introduce the support for the processors with shared memory solution

BugLink: https://bugs.launchpad.net/bugs/1956509

In some of Zen2 and Zen3 based processors, they are using the shared
memory that exposed from ACPI SBIOS. In this kind of the processors,
there is no MSR support, so we add acpi cppc function as the backend for
them.

It is using a module param (shared_mem) to enable related processors
manually. We will enable this by default once we address performance
issue on this solution.

Signed-off-by: Jinzhou Su <email address hidden>
Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit e059c184da47e92c6236f26b0fdaf9e92f0d55b5)
Signed-off-by: You-Sheng Yang <email address hidden>

4387147... by Ray Huang on 2021-12-24

cpufreq: amd-pstate: Add fast switch function for AMD P-State

BugLink: https://bugs.launchpad.net/bugs/1956509

Introduce the fast switch function for AMD P-State on the AMD processors
which support the full MSR register control. It's able to decrease the
latency on interrupt context.

Signed-off-by: Huang Rui <email address hidden>
Signed-off-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit 1d215f0319c20662b701692a2fafc7b3b8a58ae1)
Signed-off-by: You-Sheng Yang <email address hidden>