[Why]
We need HPD IRQ notifications (RX, short pulse) to properly handle
DP MST for DPIA connections.
[How]
A null pointer exception currently occurs when these are received
so add a check to validate that we have a handler installed for
the notification.
Extend the HPD handler to also handle HPD IRQ (RX) since the logic is
the same.
Fixes: e27c41d5b068 ("drm/amd/display: Support for DMUB HPD interrupt handling")
Reviewed-by: Wayne Lin <email address hidden>
Reviewed-by: Jude Shih <email address hidden>
Acked-by: Anson Jacob <email address hidden>
Tested-by: Daniel Wheeler <email address hidden>
Signed-off-by: Nicholas Kazlauskas <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(backported from commit c40a09e56fa3d17a3d06cec9a24b04364bb18c8f)
Signed-off-by: You-Sheng Yang <email address hidden>
6c7d749...
by
Nicholas Kazlauskas <email address hidden>
drm/amd/display: Don't lock connection_mutex for DMUB HPD
[Why]
Per DRM spec we only need to hold that lock when touching
connector->state - which we do not do in that handler.
Taking this locking introduces unnecessary dependencies with other
threads which is bad for performance and opens up the potential for
a deadlock since there are multiple locks being held at once.
[How]
Remove the connection_mutex lock/unlock routine and just iterate over
the drm connectors normally. The iter helpers implicitly lock the
connection list so this is safe to do.
DC link access also does not need to be guarded since the link
table is static at creation - we don't dynamically add or remove links,
just streams.
Fixes: e27c41d5b068 ("drm/amd/display: Support for DMUB HPD interrupt handling")
Reviewed-by: Jude Shih <email address hidden>
Acked-by: Anson Jacob <email address hidden>
Tested-by: Daniel Wheeler <email address hidden>
Signed-off-by: Nicholas Kazlauskas <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(cherry picked from commit d82b3266ef88dc10fe0e7031b2bd8ba7eedb7e59)
Signed-off-by: You-Sheng Yang <email address hidden>
[Why]
B0 has pipe mux for DIGC and DIGD which can be connected to PHYF/PHYG or
PHYC/PHY D.
[How]
Based on chip internal hardware revision id determine it is B0 and set
DMUB scratch register so DMUBFW can connect the display pipe is
connected correctly to the dig.
Cc: Wayne Lin <email address hidden>
Cc: Nicholas Kazlauskas <email address hidden>
Reviewed-by: Charlene Liu <email address hidden>
Acked-by: Rodrigo Siqueira <email address hidden>
Tested-by: Daniel Wheeler <email address hidden>
Signed-off-by: Hansen <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(backported from commit 3137f792c5bd68c799a9c3762fd37e428bbcf152)
Signed-off-by: You-Sheng Yang <email address hidden>
f56d327...
by
Meenakshikumar Somasundaram <email address hidden>
[Why]
- DPIA MST slot registers are not programmed during payload
allocation and hence MST does not work with DPIA.
- HPD RX interrupts are not handled for DPIA.
[How]
- Added inbox command to program the MST slots whenever
payload allocation happens for DPIA links.
- Added support for handling HPD RX interrupts
Signed-off-by: Meenakshikumar Somasundaram <email address hidden>
Reviewed-by: Jun Lei <email address hidden>
Acked-by: Nicholas Kazlauskas <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(backported from commit 139a33112f170e0a29748138fbdb849031527791)
Signed-off-by: You-Sheng Yang <email address hidden>
[Why]
Notify data from outbox corrupt, the notify type should be 2 (HPD) instead of 0
(No data). We copied the address instead of the value. The memory might be
freed in the end of outbox IRQ
[How]
We should allocate the memory of notify and copy the whole content from outbox to
hpd handle function
Fixes: 88f52b1fff891e ("drm/amd/display: Support for SET_CONFIG processing with DMUB")
Signed-off-by: Jude Shih <email address hidden>
Reviewed-by: Nicholas Kazlauskas <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(cherry picked from commit 094b21c1a3578234f06a28b80f4d2f6446b5f533)
Signed-off-by: You-Sheng Yang <email address hidden>
5ad18ab...
by
Mario Limonciello <email address hidden>
UBUNTU: SAUCE: drm/amd/display: Fixup previous PSR policy commit
Commit 9470620e99e9 ("drm/amd/display: Enable PSR by default on newer
DCN") relies upon IP version harvesting which isn't available until
5.16. For the backport of this commit, modify it to instead use
chip types (matching Van Gogh and Yellow Carp).
Signed-off-by: Mario Limonciello <email address hidden>
Change-Id: Ib50a2b278d644ad95c8cd7eeadcc496f6571c598
Signed-off-by: You-Sheng Yang <email address hidden>
16d677c...
by
Nicholas Kazlauskas <email address hidden>
drm/amd/display: Enable PSR by default on newer DCN
[Why]
For optimal power savings on panels that can support it.
This was previously left disabled by default because of issues with
compositors that do not pageflip and scan out directly to the
frontbuffer.
For these compositors we now have detection methods that wait for x
number of pageflips after a full update - triggered by a buffer or
format change typically.
This may introduce bugs or new cases not tested by users so this is
only currently targeting newer DCN.
[How]
Add code in DM to set PSR state by default for newer DCN while falling
back to the feature mask for older.
Add a global debug flag that can be set to disable it for either.
Signed-off-by: Nicholas Kazlauskas <email address hidden>
Reviewed-by: Harry Wentland <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
(cherry picked from commit 9470620e99e90999dc367bdcccc7e1274dcbb796)
Signed-off-by: You-Sheng Yang <email address hidden>
