drm/i915: Switch to LTTPR non-transparent mode link training
The DP Standard's recommendation is to use the LTTPR non-transparent
mode link training if LTTPRs are detected, so let's do this.
Besides power-saving, the advantages of this are that the maximum number
of LTTPRs can only be used in non-transparent mode (the limit is 5-8 in
transparent mode), and it provides a way to narrow down the reason for a
link training failure to a given link segment. Non-transparent mode is
probably also the mode that was tested the most by the industry.
The changes in this patchset:
- Pass the DP PHY that is currently link trained to all LT helpers, so
that these can access the correct LTTPR/DPRX DPCD registers.
- During LT take into account the LTTPR common lane rate/count and the
per LTTPR-PHY vswing/pre-emph limits.
- Switch to LTTPR non-transparent LT mode and train each link segment
according to the sequence in DP Standard v2.0 (complete CR/EQ for
each segment before continuing with the next segment).
v2:
- Switch to non-transparent mode during connector detection, which is
required before reading the per-PHY LTTPR capabilities.
- Move the DP_PHY_LTTPR() macro to drm_dp_helper.h (Ville)
- Use the new drm_dp_dpcd_read_phy_link_status() instead of adding the
same logic to intel_dp_get_link_status(). (Ville)
- Make intel_dp_lttpr_phy_caps() return a pointer to the whole array
instead of a pointer to its first element. (Ville)
- Add the intel_dp_phy_is_downstream_of_source() helper. (Ville)
- Add a code comment about the disable->enable quirk of
non-transparent mode.
- Add the intel_dp_training_pattern_set_reg() helper.
- Fix checkpatch/sparse warns.
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(cherry picked from commit b30edfd8d0b4b22f9c17c208064b39a3d93e6971)
Signed-off-by: You-Sheng Yang <email address hidden>
drm/i915: Switch to LTTPR transparent mode link training
By default LTTPRs should be in transparent link training mode,
nevertheless in this patch we switch to this default mode explicitly.
The DP Standard recommends this, supposedly because an LTTPR may be left
in the non-transparent mode (by BIOS, previous kernel, or after reset
due to a firmware bug). I haven't seen this happening, but let's follow
the DP Standard.
v2:
- Add a code comment about the explicit disabling of non-transparent
mode.
v3:
- Move check to prevent initing LTTPRs on eDP to init_dp_lttpr_init().
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(cherry picked from commit 7b2a4ab8b0ef2a6dbec0b15d2cabf5a9e7acdf4c)
Signed-off-by: You-Sheng Yang <email address hidden>
Add the helpers and register definitions needed to read out the common
and per-PHY LTTPR capabilities and perform link training in the LTTPR
non-transparent mode.
v2:
- Add drm_dp_dpcd_read_phy_link_status() and DP_PHY_LTTPR() here instead
of adding these to i915. (Ville)
v3:
- Use memmove() to convert LTTPR to DPRX link status format. (Ville)
Cc: <email address hidden>
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Acked-by: Lyude Paul <email address hidden>
Acked-by: Daniel Vetter <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(cherry picked from commit 9782f52ab5d65a667074beda11b12490935d608b)
Signed-off-by: You-Sheng Yang <email address hidden>
drm/i915: Factor out a helper to disable the DPCD training pattern
To prepare for a follow-up LTTPR change factor out a helper to disable
the training pattern in DPCD. We'll need to do this for each LTTPR
(without programming the port to output the idle pattern) when training
in LTTPR non-transparent mode.
While at it also move the disable-link-training logic from
intel_dp_set_link_train() to intel_dp_stop_link_train(), since the
latter is the only user of this.
v2:
- Move the disable-link-training logic to intel_dp_stop_link_train()
(Ville)
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(cherry picked from commit c43027a9a37541dbdc54e9dca647602175ff27a2)
Signed-off-by: You-Sheng Yang <email address hidden>
Split the prepare, link training, fallback-handling steps into their own
functions for clarity and as a preparation for the upcoming LTTPR
changes.
While at it also:
- Unexport and inline intel_dp_set_idle_link_train(), which is used at a
single place.
- Add some documentation to functions that are exported or that can use
a better description about which part of the LT sequence they
implement.
v2: (Ville)
- Unexport/inline intel_dp_set_idle_link_train()
- Make the documentation of
intel_dp_prepare_link_train()/intel_dp_stop_link_train() more accurate
wrt. HW specific details.
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(cherry picked from commit 0a5991f5d022235ba085001e2a3926f83a0aed1b)
Signed-off-by: You-Sheng Yang <email address hidden>
An LTTPR can be trained with training pattern 4 even if the DPCD
revision is < 1.4, but drm_dp_training_pattern_mask() would change
pattern 4 to pattern 3 on those DPCD revisions.
Since intel_dp_training_pattern() makes already sure that the proper
training pattern is used, all that needs to be masked out is the
scrambling disable flag, which is or'd to the mask later based on the
training pattern.
v2:
- Use a helper instead of open-coding the masking. (Ville)
Cc: Ville Syrjälä <email address hidden>
Reviewed-by: Ville Syrjälä <email address hidden>
Signed-off-by: Imre Deak <email address hidden>
Link: https://patchwork<email address hidden>
(backported from commit 6777a855d66d27c4082d6316cc0f2a26a004ed62)
Signed-off-by: You-Sheng Yang <email address hidden>
5039f6a...
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drm/i915: Plumb crtc_state to link training
Get rid of mode crtc->config usage, and some ad-hoc intel_dp state
usage by plumbing the crtc state all the way down to the link training
code.
Unfortunately we do have to keep some cached state in intel_dp so
that we can do the "does the link need retraining?" checks from
the short hpd handler.
v2: Add intel_crtc_state forward declaration
v3: Don't kill the PHY test code totally since it's
now in the hotplug work where we can get at the states
v4: Don't resurrect the debug scrambling disable bit (Imre)
Use intel_dp_mst_is_master_trans() (Imre)
Reviewed-by: Imre Deak <email address hidden>
Signed-off-by: Ville Syrjälä <email address hidden>
Link: https://patchwork.<email address hidden>
(cherry picked from commit a621860a5eb82a1b63378aac58c67fd612824013)
Signed-off-by: You-Sheng Yang <email address hidden>
3859c62...
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drm/i915: Split TGL DKL PHY buf trans per output type
Make the mess inside the buf trans funcs a bit more manageable by
splitting along the lines of output type.
Signed-off-by: Ville Syrjälä <email address hidden>
Link: https://patchwork.freedesktop<email address hidden>
Reviewed-by: Imre Deak <email address hidden>
(cherry picked from commit 6a41121f05501ce6af6a8f8300d27cdacd366201)
Signed-off-by: You-Sheng Yang <email address hidden>
891059e...
by
=?utf-8?b?VmlsbGUgU3lyasOkbMOk?= <email address hidden>
drm/i915: Split TGL combo PHY buf trans per output type
Make the mess inside the buf trans funcs a bit more manageable by
splitting along the lines of output type.
Signed-off-by: Ville Syrjälä <email address hidden>
Link: https://patchwork.<email address hidden>
Reviewed-by: Imre Deak <email address hidden>
(cherry picked from commit 4669f5c2b7edb5666d1fcb9be13bdda2a5aec066)
Signed-off-by: You-Sheng Yang <email address hidden>
