VMD will retransmit child device MSI/X using its own MSI/X table and
requester-id. This limits the number of MSI/X available to the whole
child device domain to the number of VMD MSI/X interrupts. Some VMD
devices have a mode where this remapping can be disabled, allowing child
device interrupts to bypass processing with the VMD MSI/X domain
interrupt handler and going straight the child device interrupt handler,
allowing for better performance and scaling. The requester-id still gets
changed to the VMD endpoint's requester-id, and the interrupt remapping
handlers have been updated to properly set IRTE for child device
interrupts to the VMD endpoint's context.
Some VMD platforms have existing production BIOS which rely on MSI/X
remapping and won't explicitly program the MSI/X remapping bit. This
re-enables MSI/X remapping on unload.
Disabling MSI/X remapping is only available for Icelake Server and
client VMD products.
Reviewed-by: Andy Shevchenko <email address hidden>
Signed-off-by: Jon Derrick <email address hidden>
(cherry picked from commit 0b170e4b7bb58b11268382609b408055474873ee)
Signed-off-by: You-Sheng Yang <email address hidden>
x86/apic/msi: Use Real PCI DMA device when configuring IRTE
VMD retransmits child device MSI/X with the VMD endpoint's requester-id.
In order to support direct interrupt remapping of VMD child devices,
ensure that the IRTE is programmed with the VMD endpoint's requester-id
using pci_real_dma_dev().
Reviewed-by: Andy Shevchenko <email address hidden>
Signed-off-by: Jon Derrick <email address hidden>
(cherry picked from commit 3541da4790aafc1fb3852f42fd0c93d5aed363f7)
Signed-off-by: You-Sheng Yang <email address hidden>
Moves the bus offset configuration discovery code to a new helper.
Modifies the bus offset 2-bit decode switch to have a 0 case and a
default error case, just in case the field is expanded in future
hardware.
Reviewed-by: Andy Shevchenko <email address hidden>
Signed-off-by: Jon Derrick <email address hidden>
(cherry picked from commit e4f130a8ccb80be0c5c960146812e4604dda5da4)
Signed-off-by: You-Sheng Yang <email address hidden>
irqdomain/treewide: Free firmware node after domain removal
Commit 711419e504eb ("irqdomain: Add the missing assignment of
domain->fwnode for named fwnode") unintentionally caused a dangling pointer
page fault issue on firmware nodes that were freed after IRQ domain
allocation. Commit e3beca48a45b fixed that dangling pointer issue by only
freeing the firmware node after an IRQ domain allocation failure. That fix
no longer frees the firmware node immediately, but leaves the firmware node
allocated after the domain is removed.
The firmware node must be kept around through irq_domain_remove, but should be
freed it afterwards.
Add the missing free operations after domain removal where where appropriate.
(backported from commit ec0160891e387f4771f953b888b1fe951398e5d9
Fix conflicts due to drivers/iommu/intel_irq_remapping.c was moved into
drivers/iommu/intel)
Signed-off-by: You-Sheng Yang <email address hidden>
Quite some non OF/ACPI users of irqdomains allocate firmware nodes of type
IRQCHIP_FWNODE_NAMED or IRQCHIP_FWNODE_NAMED_ID and free them right after
creating the irqdomain. The only purpose of these FW nodes is to convey
name information. When this was introduced the core code did not store the
pointer to the node in the irqdomain. A recent change stored the firmware
node pointer in irqdomain for other reasons and missed to notice that the
usage sites which do the alloc_fwnode/create_domain/free_fwnode sequence
are broken by this. Storing a dangling pointer is dangerous itself, but in
case that the domain is destroyed later on this leads to a double free.
Remove the freeing of the firmware node after creating the irqdomain from
all affected call sites to cure this.
Fixes: 711419e504eb ("irqdomain: Add the missing assignment of domain->fwnode for named fwnode")
Reported-by: Andy Shevchenko <email address hidden>
Signed-off-by: Thomas Gleixner <email address hidden>
Acked-by: Bjorn Helgaas <email address hidden>
Acked-by: Marc Zyngier <email address hidden>
Cc: <email address hidden>
Link: https://<email address hidden>
(backported from commit e3beca48a45b5e0e6e6a4e0124276b8248dcc9bb
Fix conflicts for drivers/iommu/amd_iommu.c as moved into
drivers/iommu/amd and drivers/iommu/intel_irq_remapping.c into
drivers/iommu/intel)
Signed-off-by: You-Sheng Yang <email address hidden>
PCI: vmd: Use Shadow MEMBAR registers for QEMU/KVM guests
VMD device 28C0 natively assists guest passthrough of the VMD endpoint
through the use of shadow registers that provide Host Physical Addresses
to correctly assign bridge windows. These shadow registers are only
available if VMD config space register 0x70, bit 1 is set.
In order to support this mode in existing VMD devices which don't
natively support the shadow register, it was decided that the hypervisor
could offer the shadow registers in a vendor-specific PCI capability.
QEMU has been modified to create this vendor-specific capability and
supply the shadow membar registers for VMDs which don't natively support
this feature. This patch adds this mode and updates the supported device
list to allow this feature to be used on these VMDs.
Link: https://<email address hidden>
Signed-off-by: Jon Derrick <email address hidden>
Signed-off-by: Lorenzo Pieralisi <email address hidden>
(cherry picked from commit 51f939b11cb1c47ed2a8d56b23f25483b7363f8e)
Signed-off-by: You-Sheng Yang <email address hidden>
