9ae0041...
by
You-Sheng Yang
on 2020-10-26
Bug 1879633 : Support Qualcomm Killer 500s (QCA6390)
a4cd847...
by
You-Sheng Yang
on 2020-10-26
UBUNTU: [Config] enable ath11k WiFi driver
Signed-off-by: You-Sheng Yang <email address hidden>
f45dd81...
by
Kalle Valo <email address hidden>
on 2020-10-01
ath11k: remove unnecessary casts to u32
These casts are not needed. No changes in functionality.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit 404f5de2f997731 3ad33182323a557 d5d3916773)
Signed-off-by: You-Sheng Yang <email address hidden>
4afaa6d...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: enable idle power save mode
Host sends wmi command to allow hardware enter idle power
save mode in ath11k_mac_op_start function.
hw parameter idle_ps indicates whether idle power save is supported.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit c83c500b55b6de7 b59c90070167c3a 8e2ab40f87)
Signed-off-by: You-Sheng Yang <email address hidden>
f92699d...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: start a timer to update HP for CE pipe 4
For QCA6390, Start a timer to update CE pipe 4 ring HP when shadow
register is enabled. Its' to avoid that HP isn't updated to target
register.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit 9b309970c4eafdf 49e99b66232e7fc eec9fb191a)
Signed-off-by: You-Sheng Yang <email address hidden>
ae102d7...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: start a timer to update REO cmd ring
Start a timer to update REO HP if HP isn't updated to target.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit 506e7e9bbf3f4c5 1f5f0323173aa9f f2f704ae58)
Signed-off-by: You-Sheng Yang <email address hidden>
f101cd4...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: start a timer to update TCL HP
The timer is to check if TCL HP isn't updated to target.
The timer will postpone itself if there are TX operations
during the interval, otherwise the timer handler updates
the HP again so the index value in HP register will be
forwarded to target register, and the timer stops afterwards.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit 8ec5a6ab9c7eeee b59f74e59e53de7 8dda402da8)
Signed-off-by: You-Sheng Yang <email address hidden>
ff99a25...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: set WMI pipe credit to 1 for QCA6390
For QCA6390, set wmi credit to 1 to avoid back-to-back write to
shadow register when shadow register is enabled.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit 9df6d8399d6789c 4eb81878285e780 8225a2a141)
Signed-off-by: You-Sheng Yang <email address hidden>
7515d29...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: enable shadow register configuration and access
To enable shadow register access, host needs to pass shadow
register configuration to firmware via qmi message. Host also
needs to update ring's HP or TP address to shadow register
address. The write operation to shadow register will be
forwarded to target register by hardware automatically, and
the write operation to shadow register is permitted even
when the target is in power save or sleep mode.
Update the shadow config whenever power up happens.
This feature is controlled by hw parameter supports_ shadow_ regs which is only
enabled for QCA6390.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit e838c14a9ee1dfe 660527128d8f2e3 191c8b1aad)
Signed-off-by: You-Sheng Yang <email address hidden>
cfaf357...
by
Carl Huang <email address hidden>
on 2020-10-01
ath11k: read and write registers below unwindowed address
For QCA6390, host can read and write registers below unwindowed
address directly without programming the window register. For
registers below bar0 + 4k - 32, host can read and write regardless
of the power save state. Shadow registers are located below
bar0 + 4K - 32.
Before MHI power up, there is no need to wakeup MHI so ini_done is
added to indicate it.
Tested-on: QCA6390 hw2.0 PCI WLAN.HST. 1.0.1-01740- QCAHSTSWPLZ_ V2_TO_X86- 1
Signed-off-by: Carl Huang <email address hidden>
Signed-off-by: Kalle Valo <email address hidden>
Link: https://<email address hidden>
(cherry picked from commit a05bd85133357b0 c1b0a52dda4ee4d 7e31069f4f)
Signed-off-by: You-Sheng Yang <email address hidden>