a97ef51...
by
Mika Westerberg <email address hidden>
ACPI / property: Add two new Thunderbolt property GUIDs to the list
Ice Lake Thunderbolt controller includes two new device property
compatible properties that we need to be able to extract in the driver
so add them to the growing array of GUIDs.
Signed-off-by: Mika Westerberg <email address hidden>
Acked-by: Rafael J. Wysocki <email address hidden>
(cherry picked from commit dfda204198848b47bdb98ab83b94dbb7c7692b55)
Signed-off-by: You-Sheng Yang <email address hidden>
d93434e...
by
Mika Westerberg <email address hidden>
thunderbolt: Add support for Intel Ice Lake
The Thunderbolt controller is integrated into the Ice Lake CPU itself
and requires special flows to power it on and off using force power bit
in NHI VSEC registers. Runtime PM (RTD3) and Sx flows also differ from
the discrete solutions. Now the firmware notifies the driver whether
RTD3 entry or exit are possible. The driver is responsible of sending
Go2Sx command through link controller mailbox when system enters Sx
states (suspend-to-mem/disk). Rest of the ICM firwmare flows follow
Titan Ridge.
Signed-off-by: Raanan Avargil <email address hidden>
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit 3cdb9446a117d5d63af823bde6fe6babc312e77b)
Signed-off-by: You-Sheng Yang <email address hidden>
9ab8bba...
by
Mika Westerberg <email address hidden>
thunderbolt: Expose active parts of NVM even if upgrade is not supported
Ice Lake Thunderbolt controller NVM firmware is part of the BIOS image
which means it is not writable through the DMA port anymore. However, we
can still read it so we can keep nvm_version and active parts of NVM.
This way users still can find out the active NVM version and other
potentially useful information directly from Linux.
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit 3f415e5ee18b0097755afc3ac3a5640b196a239e)
Signed-off-by: You-Sheng Yang <email address hidden>
6742f3e...
by
Mika Westerberg <email address hidden>
thunderbolt: Hide switch attributes that are not set
Thunderbolt host routers may not always contain DROM that includes
device identification information. This is mostly needed for Ice Lake
systems but some Falcon Ridge controllers on PCs also do not have DROM.
In that case hide the identification attributes.
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit 58f414fa435cf728a82f435bac4781da86afb623)
Signed-off-by: You-Sheng Yang <email address hidden>
88d3a93...
by
Mika Westerberg <email address hidden>
thunderbolt: Do not fail adding switch if some port is not implemented
There are two ways to mark a port as unimplemented. Typical way is to
return port type as TB_TYPE_INACTIVE when its config space is read.
Alternatively if the port is not physically present (such as ports 10
and 11 in ICL) reading from port config space returns
TB_CFG_ERROR_INVALID_CONFIG_SPACE instead. Currently the driver bails
out from adding the switch if it receives any error during port
inititialization which is wrong.
Handle this properly and just leave the port as TB_TYPE_INACTIVE before
continuing to the next port.
This also allows us to get rid of special casing for Light Ridge port 5
in eeprom.c.
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit d94dcbb10183f3b384c84e65724d2b753aa53c4d)
Signed-off-by: You-Sheng Yang <email address hidden>
ac42621...
by
Mika Westerberg <email address hidden>
thunderbolt: Use 32-bit writes when writing ring producer/consumer
The register access should be using 32-bit reads/writes according to the
datasheet. With the previous generation hardware 16-bit writes have been
working but starting with ICL this is not the case anymore so fix
producer/consumer register update to use correct width register address.
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit 943795219d3cb9f8ce6ce51cad3ffe1f61e95c6b)
Signed-off-by: You-Sheng Yang <email address hidden>
e4c86d5...
by
Mika Westerberg <email address hidden>
thunderbolt: Move NVM upgrade support flag to struct icm
This is depends on the controller and on the platform/CPU we are
running. Move it to struct icm so we can set it per controller.
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
Tested-by: Mario Limonciello <email address hidden>
(cherry picked from commit f437c24bf694b0293f835dea8c25e3a5c1433d07)
Signed-off-by: You-Sheng Yang <email address hidden>
a7cbe1a...
by
Mika Westerberg <email address hidden>
thunderbolt: Correct path indices for PCIe tunnel
PCIe tunnel path indices got mixed up when we added support for tunnels
between switches that are not adjacent. This did not affect the
functionality as it is just an index but fix it now nevertheless to make
the code easier to understand.
Reported-by: Rajmohan Mani <email address hidden>
Fixes: 8c7acaaf020f ("thunderbolt: Extend tunnel creation to more than 2 adjacent switches")
Signed-off-by: Mika Westerberg <email address hidden>
Reviewed-by: Yehezkel Bernat <email address hidden>
(cherry picked from commit ce19f91eae43e39d5a1da55344756ab5a3c7e8d1)
Signed-off-by: You-Sheng Yang <email address hidden>
mfd: intel-lpss: add quirk for Dell XPS 13 7390 2-in-1
The memory region intel-lpss-pci uses has been declared as
write-combining
[ 0.001728] 5 base 4000000000 mask 6000000000 write-combining
This leads to the system hangs druing booting up.
