drm/amdgpu: don't clamp debugfs register access to the BAR size
This prevents us from accessing extended registers in tools like
umr. The register access functions already check if the offset
is beyond the BAR size and use the indirect accessors with locking
so this is safe.
Reviewed-by: Christian König <email address hidden>
Signed-off-by: Alex Deucher <email address hidden>
[Why]
The visual corruption due to low display clock value.
Observed on Carrizo 4K@60Hz.
[How]
There was earlier patch for dspclk:
drm/amd/display: Raise dispclk value for dce_update_clocks'
Adding +15% workaround also to to dce11_update_clocks
Change-Id: I6b4c60ce7ece411e09a88ef8eda68fb2947c734f
Signed-off-by: Roman Li <email address hidden>
Reviewed-by: Nicholas Kazlauskas <email address hidden>
Acked-by: Alex Deucher <email address hidden>
drm/amdgpu: fix the incorrect external id for raven series
This patch fixes the incorrect external id that kernel reports to user mode
driver. Raven2's rev_id is starts from 0x8, so its external id (0x81) should
start from rev_id + 0x79 (0x81 - 0x8). And Raven's rev_id should be 0x21 while
rev_id == 1.
In some cases, psp response status is not 0 even there is no
problem while the command is submitted. Some version of PSP FW
doesn't write 0 to that field.
So here we would like to only print a warning instead of an error
during psp initialization to avoid breaking hw_init and it doesn't
return -EINVAL.
Change-Id: I680679983f972b6969f4949f1faafaf17fe996a6
Signed-off-by: Aaron Liu <email address hidden>
Reviewed-by: Huang Rui <email address hidden>
Reviewed-by: Xiangliang Yu<email address hidden>
Acked-by: Christian König <email address hidden>
Reviewed-by: Feifei Xu <email address hidden>
Reviewed-by: Paul Menzel <email address hidden>