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- 147. By bcollins
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Subject: [PATCH]: Fix SILO initrd calculations
From: "David S. Miller" <email address hidden>SILO uses a different idea of "phys_base" than the kernel
does when deciding the value to stick into the ramdisk
cookie of the kernel.The kernel uses the smallest "phys" found in the "available"
properties, whereas SILO uses the "phys" of the first element of the
"reg" property. This can be different, as the following Niagara
system /memory node dump shows:reg 00000000 00800000 00000003 ff800000
available 00000003 fffd0000 00000000 00002000
00000003 fffcc000 00000000 00002000
00000003 fffc0000 00000000 00006000
00000003 fffa4000 00000000 0000c000
00000003 ff000000 00000000 00fa2000
00000000 00c00000 00000003 fe3fe000
name memory0x800000 vs. 0xc00000
The fix is simple, please apply.
- 146. By bcollins
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Subject: [PATCH]: SILO Niagara/SUN4V support
From: "David S. Miller" <email address hidden>This patch against silo-1.4.10 makes SILO work on Niagara/SUN4V:
1) Don't try to access %ver register on Niagara, this will
trap because it's a hyperprivileged operation on SUN4V.We detect SUN4V with an ugly trick, we try to write to
the PSTATE_AG bit of %pstate. If it reads back zero, it
is SUN4V.A better way to do this would be to fetch the "compatible"
property of the OBP root node and check if it is "sun4v"
but that might not be so easy to do this early.To be honest, the necessity of this I-cache flushing code
itself is suspect. I bet we can delete the whole thing
or replace it with a portable loop that does "flush %reg"
over the area we want the be I-cache synced.2) Kill all of this code flushing the fixed SUN4U TLB entries.
We don't load the TLB entries by hand any more so this code
is just noise and would be wrong on SUN4V in any event.3) Kill all of the %tick{_cmpr} register poking.
All this timer code cares about is that it records %tick when
it starts, and then later make relative measurements using
that saved value.The rest of the code touching %tick{_cmpr} is superfluous.
Besides you can't write to %tick on SUN4V as that is a
hyperprivileged operation.4) Return 'sun4u' from silo_get_
architecture( ) when we detect
'sun4v', we want to run the same code paths.We could add a "sun4v" architecture type but I see no gain
from that as it would just bloat up all the sun4u tests
with a new "||" branch.If someone could at least do some light testing of this on
SUN4U I'd really appreciate this. Ben, please don't apply this
until you or someone else does at least one SUN4U smoke test.I've successfully tested this on a T-200 with 16GB of ram.
Thanks.
- 144. By bcollins
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(davem)
silo/second/memory. c loads 4MB sized TLB entries, and for an
unaligned physical address that just strips off the lower
bits of the physical address, resulting in corrupted memory.The good news is that we don't need to load these TLB entries,
prom_map() sets up entires automatically for in the firmware TLB miss
handler. - 142. By bcollins
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Ben, this patch is to work around some build problems with
gcc-4.x that fabbione was running into.Somehow, some normal userland headers are getting fetched
during the second stage bootloader build. (probably via some
gcc internal header or something like that) And of course
things go south because second/disk.c exports routines with
names like "open()" and "close()", ie. not good for global
namespace.I hit as much of the include/silo.h functions as I easily could,
usually adding the "silo_" prefix to their names then fixing up
the tree.xmit() wasn't used by anything, so I deleted it.
- 140. By bcollins
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Patch from Chris Newport <email address hidden> to fix sun4x isofs loading.
Reports that initrd loading is still broken.