This imports readline 8.1. I did this via various hackery in a
readline git repository to make a version of readline identical to
gdb's, then did a git merge.
sim: erc32/m32c/rl78: add sim_memory_map stub for gdb
These ports don't use the common sim core, so they weren't providing
a sim_memory_map for gdb, so they failed to link with the new memory
map logic added for the sim. Add stubs to fix.
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement
sim_pc_get. Lets switch the sim-watch core for monitoring pc events to
the sim_pc_get API so this module works for all ports, and then we can
delete this old back channel of snooping in the port's cpu state -- the
code needs the pointer to the pc storage so that it can read out bytes
and compare them to the watchrange.
This also fixes the logic on multi-cpu sims by removing the limitation
of only being able to watch CPU0's state.
The AC_CONFIG_HEADER macro is long deprecated, so switch to the
newer form. This also gets rid of the position limitation, and
drops support for an argument to SIM_AC_COMMON which we haven't
used anywhere.
These settings might have made sense in darker compiler times, but I
think they're largely obsolete now. Looking through the values that
get used in HDEFINES, it's quite limited, and configure itself should
handle them. If we still need something, we can leverage standard
autoconf macros instead, after we get a clear user report.
TDEFINES was never set anywhere and was always empty, so prune that.
2c6f2aa...
by
GDB Administrator <email address hidden>
