In the XML target descriptions, registers can be given a type of
"code_ptr" or "data_ptr". GDB always uses the builtin type for "void
*" for these registers. However, this is wrong if the register's size
does not match (e.g. the legacy "sp" and "pc" ARM64 registers when
using a purecap binary for which "void *" is a capability). If the
sizes don't match, try to find a matching type such as "long" or
"intcap_t" to use instead.
CHERI-RISC-V: Improve handling of hybrid binaries.
- Add CHERI to the RISC-V ISA features if an ELF file contains the
"xcheri" attribute. This is set in both hybrid and purecap
ELF files. This isn't needed for purecap ELF files but does enable
capability types and the "__capability" keyword on hybrid
binaries and libraries.
- Add address_class gdbarch methods so that capability pointer types
are tagged as capabilities in hybrid binaries. This is a bit gross.
Ideally riscv_address_class_type_flags would only enable the
TYPE_INSTANCE_FLAG_CAPABILITY if the passed in byte_size (from
DW_ATTR_byte_size) was equal to riscv_isa_clen() (aka
gdbarch_capability_bit()). However, for some reason this gdbarch
method doesn't take the gdbarch member. For now, rely on the fact
that it is only called if either there is a DW_ATTR_address_space
attribute on a pointer, or if the byte_size doesn't match the
default pointer size. Assuming there is no DW_ATTR_address_space
defined for RISC-V yet, this means it should only be called for a
size mismatch, and since we don't allow creating integer pointers in
purecap, this means it can only be called for capability pointers
for hybrid binaries.
CHERI-RISC-V: Support for displaying capability attributes.
This supports both the compact format (always used for annotating
pointer variables) and the verbose format (available via set print
compact-capabilities off) when displaying individual capabilities.
