~ubuntu-kernel/ubuntu/+source/linux/+git/xenial:mbm

Last commit made on 2016-04-06
Get this branch:
git clone -b mbm https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/xenial
Members of Ubuntu Kernel Repositories can upload to this branch. Log in for directions.

Branch merges

Branch information

Recent commits

2c54cf0... by Tim Gardner

UBUNTU: [Config] CONFIG_ARCH_ROCKCHIP=y

BugLink: http://bugs.launchpad.net/bugs/1566283

Signed-off-by: Tim Gardner <email address hidden>

71f6fc4... by Vikas Shivappa <email address hidden>

perf/x86/mbm: Add support for MBM counter overflow handling

BugLink: http://bugs.launchpad.net/bugs/1397880

This patch adds a per package timer which periodically updates the
memory bandwidth counters for the events that are currently active.

Current patch has a periodic timer every 1s since the SDM guarantees
that the counter will not overflow in 1s but this time can be definitely
improved by calibrating on the system. The overflow is really a function
of the max memory b/w that the socket can support, max counter value and
scaling factor.

Signed-off-by: Vikas Shivappa <email address hidden>
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Tony Luck <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml.kernel.org/r/013b756c5006b1c4ca411f3ecf43ed52f19fbf87<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(cherry picked from commit e7ee3e8cb550ce43752ae1d1b190d6b5c4150a43)
Signed-off-by: Tim Gardner <email address hidden>

c1509e6... by Vikas Shivappa <email address hidden>

perf/x86/mbm: Implement RMID recycling

BugLink: http://bugs.launchpad.net/bugs/1397880

RMID could be allocated or deallocated as part of RMID recycling.

When an RMID is allocated for MBM event, the MBM counter needs to be
initialized because next time we read the counter we need the previous
value to account for total bytes that went to the memory controller.

Similarly, when RMID is deallocated we need to update the ->count
variable.

Signed-off-by: Vikas Shivappa <email address hidden>
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Tony Luck <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(cherry picked from commit 2d4de8376ff1d94a5070cfa9092c59bfdc4e693e)
Signed-off-by: Tim Gardner <email address hidden>

dd972d8... by Tony Luck

perf/x86/mbm: Add memory bandwidth monitoring event management

BugLink: http://bugs.launchpad.net/bugs/1397880

Includes all the core infrastructure to measure the total_bytes and
bandwidth.

We have per socket counters for both total system wide L3 external
bytes and local socket memory-controller bytes. The OS does MSR writes
to MSR_IA32_QM_EVTSEL and MSR_IA32_QM_CTR to read the counters and
uses the IA32_PQR_ASSOC_MSR to associate the RMID with the task. The
tasks have a common RMID for CQM (cache quality of service monitoring)
and MBM. Hence most of the scheduling code is reused from CQM.

Signed-off-by: Tony Luck <email address hidden>
[ Restructured rmid_read to not have an obvious hole, removed MBM_CNTR_MAX as its unused. ]
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Vikas Shivappa <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml.kernel.org/r/abd7aac9a18d93b95b985b931cf258df0164746d<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>

(cherry picked from commit 87f01cc2a2914b61ade5ec834377fa7819484173)
Signed-off-by: Tim Gardner <email address hidden>

8ae10f4... by Vikas Shivappa <email address hidden>

perf/x86/mbm: Add Intel Memory B/W Monitoring enumeration and init

BugLink: http://bugs.launchpad.net/bugs/1397880

The MBM init patch enumerates the Intel MBM (Memory b/w monitoring)
and initializes the perf events and datastructures for monitoring the
memory b/w.

Its based on original patch series by Tony Luck and Kanaka Juvva.

Memory bandwidth monitoring (MBM) provides OS/VMM a way to monitor
bandwidth from one level of cache to another. The current patches
support L3 external bandwidth monitoring. It supports both 'local
bandwidth' and 'total bandwidth' monitoring for the socket. Local
bandwidth measures the amount of data sent through the memory controller
on the socket and total b/w measures the total system bandwidth.

Extending the cache quality of service monitoring (CQM) we add two
more events to the perf infrastructure:

  intel_cqm_llc/local_bytes - bytes sent through local socket memory controller
  intel_cqm_llc/total_bytes - total L3 external bytes sent

The tasks are associated with a Resouce Monitoring ID (RMID) just like
in CQM and OS uses a MSR write to indicate the RMID of the task during
scheduling.

Signed-off-by: Vikas Shivappa <email address hidden>
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Tony Luck <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(back ported from commit 33c3cc7acfd95968d74247f1a4e1b0727a07ed43)
Signed-off-by: Tim Gardner <email address hidden>

 Conflicts:
 arch/x86/kernel/cpu/common.c

31c2013... by tglx

x86/topology: Create logical package id

BugLink: http://bugs.launchpad.net/bugs/1397880

For per package oriented services we must be able to rely on the number of CPU
packages to be within bounds. Create a tracking facility, which

- calculates the number of possible packages depending on nr_cpu_ids after boot

- makes sure that the package id is within the number of possible packages. If
  the apic id is outside we map it to a logical package id if there is enough
  space available.

Provide interfaces for drivers to query the mapping and do translations from
physcial to logical ids.

Signed-off-by: Thomas Gleixner <email address hidden>
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Cc: Andi Kleen <email address hidden>
Cc: Andrew Morton <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Harish Chegondi <email address hidden>
Cc: Jacob Pan <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Kan Liang <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Luis R. Rodriguez <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Toshi Kani <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Link: http://<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(cherry picked from commit 1f12e32f4cd5243ae46d8b933181be0d022c6793)
Signed-off-by: Tim Gardner <email address hidden>

a6ebb44... by Linus Torvalds <email address hidden>

Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

BugLink: http://bugs.launchpad.net/bugs/1397880

Pull timer updates from Thomas Gleixner:
 "The timer department delivers this time:

   - Support for cross clock domain timestamps in the core code plus a
     first user. That allows more precise timestamping for PTP and
     later for audio and other peripherals.

     The ptp/e1000e patches have been acked by the relevant maintainers
     and are carried in the timer tree to avoid merge ordering issues.

   - Support for unregistering the current clocksource watchdog. That
     lifts a limitation for switching clocksources which has been there
     from day 1

   - The usual pile of fixes and updates to the core and the drivers.
     Nothing outstanding and exciting"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (26 commits)
  time/timekeeping: Work around false positive GCC warning
  e1000e: Adds hardware supported cross timestamp on e1000e nic
  ptp: Add PTP_SYS_OFFSET_PRECISE for driver crosstimestamping
  x86/tsc: Always Running Timer (ART) correlated clocksource
  hrtimer: Revert CLOCK_MONOTONIC_RAW support
  time: Add history to cross timestamp interface supporting slower devices
  time: Add driver cross timestamp interface for higher precision time synchronization
  time: Remove duplicated code in ktime_get_raw_and_real()
  time: Add timekeeping snapshot code capturing system time and counter
  time: Add cycles to nanoseconds translation
  jiffies: Use CLOCKSOURCE_MASK instead of constant
  clocksource: Introduce clocksource_freq2mult()
  clockevents/drivers/exynos_mct: Implement ->set_state_oneshot_stopped()
  clockevents/drivers/arm_global_timer: Implement ->set_state_oneshot_stopped()
  clockevents/drivers/arm_arch_timer: Implement ->set_state_oneshot_stopped()
  clocksource/drivers/arm_global_timer: Register delay timer
  clocksource/drivers/lpc32xx: Support timer-based ARM delay
  clocksource/drivers/lpc32xx: Support periodic mode
  clocksource/drivers/lpc32xx: Don't use the prescaler counter for clockevents
  clocksource/drivers/rockchip: Add err handle for rk_timer_init
  ...

(cherry picked from commit 8a284c062ec923c924c79e3b1b5199b8d72904fc)
Signed-off-by: Tim Gardner <email address hidden>

12c6174... by Borislav Petkov <email address hidden>

x86/cpufeature: Carve out X86_FEATURE_*

BugLink: http://bugs.launchpad.net/bugs/1397880

Move them to a separate header and have the following
dependency:

  x86/cpufeatures.h <- x86/processor.h <- x86/cpufeature.h

This makes it easier to use the header in asm code and not
include the whole cpufeature.h and add guards for asm.

Suggested-by: H. Peter Anvin <email address hidden>
Signed-off-by: Borislav Petkov <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Thomas Gleixner <email address hidden>
Link: http://<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(back ported from commit cd4d09ec6f6c12a2cc3db5b7d8876a325a53545b)
Signed-off-by: Tim Gardner <email address hidden>

 Conflicts:
 arch/x86/include/asm/cpufeature.h
 lib/atomic64_test.c

4b3b13f... by Vikas Shivappa <email address hidden>

perf/x86/cqm: Fix CQM memory leak and notifier leak

BugLink: http://bugs.launchpad.net/bugs/1397880

Fixes the hotcpu notifier leak and other global variable memory leaks
during CQM (cache quality of service monitoring) initialization.

Signed-off-by: Vikas Shivappa <email address hidden>
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Tony Luck <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>
(cherry picked from commit ada2f634cd50d050269b67b4e2966582387e7c27)
Signed-off-by: Tim Gardner <email address hidden>

5c6dfa5... by Vikas Shivappa <email address hidden>

perf/x86/cqm: Fix CQM handling of grouping events into a cache_group

BugLink: http://bugs.launchpad.net/bugs/1397880

Currently CQM (cache quality of service monitoring) is grouping all
events belonging to same PID to use one RMID. However its not counting
all of these different events. Hence we end up with a count of zero
for all events other than the group leader.

The patch tries to address the issue by keeping a flag in the
perf_event.hw which has other CQM related fields. The field is updated
at event creation and during grouping.

Signed-off-by: Vikas Shivappa <email address hidden>
[peterz: Changed hw_perf_event::is_group_event to an int]
Signed-off-by: Peter Zijlstra (Intel) <email address hidden>
Reviewed-by: Tony Luck <email address hidden>
Acked-by: Thomas Gleixner <email address hidden>
Cc: Alexander Shishkin <email address hidden>
Cc: Andy Lutomirski <email address hidden>
Cc: Arnaldo Carvalho de Melo <email address hidden>
Cc: Borislav Petkov <email address hidden>
Cc: Brian Gerst <email address hidden>
Cc: David Ahern <email address hidden>
Cc: Denys Vlasenko <email address hidden>
Cc: H. Peter Anvin <email address hidden>
Cc: Jiri Olsa <email address hidden>
Cc: Linus Torvalds <email address hidden>
Cc: Matt Fleming <email address hidden>
Cc: Namhyung Kim <email address hidden>
Cc: Peter Zijlstra <email address hidden>
Cc: Stephane Eranian <email address hidden>
Cc: Vince Weaver <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Cc: <email address hidden>
Link: http://lkml<email address hidden>
Signed-off-by: Ingo Molnar <email address hidden>

(cherry picked from commit a223c1c7ab4cc64537dc4b911f760d851683768a)
Signed-off-by: Tim Gardner <email address hidden>