Merge lp:~rsandifo/gcc-linaro/lp823708-4.6 into lp:gcc-linaro/4.6

[Richard Sandiford]

Testing whether the patch survives a Thumb-2 bootstrap.

[Michael Hope (michaelh1)]

cbuild has taken a snapshot of this branch at r106798 and queued it for build.

The snapshot is available at:
 http://ex.seabright.co.nz/snapshots/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6.tar.xdelta3.xz

and will be built on the following builders:
 a9-builder armv5-builder baremetal i686 x86_64

You can track the build queue at:
 http://ex.seabright.co.nz/helpers/scheduler

cbuild-snapshot: gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6
cbuild-ancestor: lp:gcc-linaro/4.6+bzr106797
cbuild-state: check

[Michael Hope (michaelh1)]

cbuild successfully built this on i686-natty-cbuild180-oort2-i686r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/i686-natty-cbuild180-oort2-i686r1

+PASS: gcc.dg/torture/pr49030.c -O0 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O1 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto -flto-partition=none (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-loops (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -g (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -Os (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/i686-natty-cbuild180-oort2-i686r1/gcc-testsuite.txt

cbuild-checked: i686-natty-cbuild180-oort2-i686r1

[Michael Hope (michaelh1)]

cbuild successfully built this on x86_64-natty-cbuild180-oort1-x86_64r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/x86_64-natty-cbuild180-oort1-x86_64r1

+PASS: gcc.dg/torture/pr49030.c -O0 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O1 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto -flto-partition=none (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-loops (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -g (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -Os (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/x86_64-natty-cbuild180-oort1-x86_64r1/gcc-testsuite.txt

cbuild-checked: x86_64-natty-cbuild180-oort1-x86_64r1

[Michael Hope (michaelh1)]

cbuild successfully built this on armv7l-natty-cbuild180-ursa2-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa2-cortexa9r1

+PASS: gcc.dg/torture/pr49030.c -O0 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O1 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto -flto-partition=none (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-loops (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -g (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -Os (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa2-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild180-ursa2-cortexa9r1

[Richard Sandiford (rsandifo)]

The patch has now been accepted upstream.

[Michael Hope (michaelh1)]

cbuild successfully built this on armv7l-natty-cbuild180-ursa3-armv5r2.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa3-armv5r2

+PASS: gcc.dg/torture/pr49030.c -O0 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O1 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto -flto-partition=none (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-loops (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -g (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -Os (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa3-armv5r2/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild180-ursa3-armv5r2

[Michael Hope (michaelh1)]

cbuild successfully built this on armv7l-natty-cbuild180-ursa4-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa4-cortexa9r1

+PASS: gcc.dg/torture/pr49030.c -O0 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O1 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O2 -flto -flto-partition=none (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -fomit-frame-pointer -funroll-loops (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -O3 -g (test for excess errors)
+PASS: gcc.dg/torture/pr49030.c -Os (test for excess errors)

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106798~rsandifo~lp823708-4.6/logs/armv7l-natty-cbuild180-ursa4-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild180-ursa4-cortexa9r1

[Michael Hope (michaelh1)]

The 4.5 version is at lp:~rsandifo/gcc-linaro/lp823708-4.5

It failed bootstrap on Thumb-2 but passed on ARMv5. Richard wants to investigate before committing this branch.

=== modified file 'ChangeLog.linaro'
--- ChangeLog.linaro	2011-08-26 14:32:47 +0000
+++ ChangeLog.linaro	2011-09-05 10:33:49 +0000
@@ -1,3 +1,20 @@
[phone]  Richard Sandiford  <[e-mail]>
+
+	gcc/
+	PR target/49030
+	* config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare.
+	* config/arm/arm.c (maybe_get_arm_condition_code): New function,
+	reusing the old code from get_arm_condition_code.  Return ARM_NV
+	for invalid comparison codes.
+	(get_arm_condition_code): Redefine in terms of
+	maybe_get_arm_condition_code.
+	* config/arm/predicates.md (arm_comparison_operator): Use
+	maybe_get_arm_condition_code.
+
+	gcc/testsuite/
+	PR target/49030
+	* gcc.dg/torture/pr49030.c: New test.
+
 2011-08-26  Richard Sandiford  <[e-mail]>
 
 	gcc/

=== modified file 'gcc/config/arm/arm-protos.h'
--- gcc/config/arm/arm-protos.h	2011-07-04 14:03:49 +0000
+++ gcc/config/arm/arm-protos.h	2011-09-05 10:33:49 +0000
@@ -178,6 +178,7 @@
 #endif
 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
 #ifdef RTX_CODE
+extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
 extern void thumb1_final_prescan_insn (rtx);
 extern void thumb2_final_prescan_insn (rtx);
 extern const char *thumb_load_double_from_address (rtx *);

=== modified file 'gcc/config/arm/arm.c'
--- gcc/config/arm/arm.c	2011-08-24 17:35:16 +0000
+++ gcc/config/arm/arm.c	2011-09-05 10:33:49 +0000
@@ -17389,10 +17389,10 @@
    decremented/zeroed by arm_asm_output_opcode as the insns are output.  */
 
 /* Returns the index of the ARM condition code string in
-   `arm_condition_codes'.  COMPARISON should be an rtx like
-   `(eq (...) (...))'.  */
-static enum arm_cond_code
-get_arm_condition_code (rtx comparison)
+   `arm_condition_codes', or ARM_NV if the comparison is invalid.
+   COMPARISON should be an rtx like `(eq (...) (...))'.  */
+enum arm_cond_code
+maybe_get_arm_condition_code (rtx comparison)
 {
   enum machine_mode mode = GET_MODE (XEXP (comparison, 0));
   enum arm_cond_code code;
@@ -17416,11 +17416,11 @@
     case CC_DLTUmode: code = ARM_CC;
 
     dominance:
-      gcc_assert (comp_code == EQ || comp_code == NE);
-
       if (comp_code == EQ)
 	return ARM_INVERSE_CONDITION_CODE (code);
-      return code;
+      if (comp_code == NE)
+	return code;
+      return ARM_NV;
 
     case CC_NOOVmode:
       switch (comp_code)
@@ -17429,7 +17429,7 @@
 	case EQ: return ARM_EQ;
 	case GE: return ARM_PL;
 	case LT: return ARM_MI;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_Zmode:
@@ -17437,7 +17437,7 @@
 	{
 	case NE: return ARM_NE;
 	case EQ: return ARM_EQ;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_Nmode:
@@ -17445,7 +17445,7 @@
 	{
 	case NE: return ARM_MI;
 	case EQ: return ARM_PL;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CCFPEmode:
@@ -17470,7 +17470,7 @@
 	  /* UNEQ and LTGT do not have a representation.  */
 	case UNEQ: /* Fall through.  */
 	case LTGT: /* Fall through.  */
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_SWPmode:
@@ -17486,7 +17486,7 @@
 	case GTU: return ARM_CC;
 	case LEU: return ARM_CS;
 	case LTU: return ARM_HI;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_Cmode:
@@ -17494,7 +17494,7 @@
 	{
 	case LTU: return ARM_CS;
 	case GEU: return ARM_CC;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_CZmode:
@@ -17506,7 +17506,7 @@
 	case GTU: return ARM_HI;
 	case LEU: return ARM_LS;
 	case LTU: return ARM_CC;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CC_NCVmode:
@@ -17516,7 +17516,7 @@
 	case LT: return ARM_LT;
 	case GEU: return ARM_CS;
 	case LTU: return ARM_CC;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     case CCmode:
@@ -17532,13 +17532,22 @@
 	case GTU: return ARM_HI;
 	case LEU: return ARM_LS;
 	case LTU: return ARM_CC;
-	default: gcc_unreachable ();
+	default: return ARM_NV;
 	}
 
     default: gcc_unreachable ();
     }
 }
 
+/* Like maybe_get_arm_condition_code, but never return ARM_NV.  */
+static enum arm_cond_code
+get_arm_condition_code (rtx comparison)
+{
+  enum arm_cond_code code = maybe_get_arm_condition_code (comparison);
+  gcc_assert (code != ARM_NV);
+  return code;
+}
+
 /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed
    instructions.  */
 void

=== modified file 'gcc/config/arm/predicates.md'
--- gcc/config/arm/predicates.md	2011-08-13 08:40:36 +0000
+++ gcc/config/arm/predicates.md	2011-09-05 10:33:49 +0000
@@ -242,10 +242,9 @@
 ;; True for integer comparisons and, if FP is active, for comparisons
 ;; other than LTGT or UNEQ.
 (define_special_predicate "arm_comparison_operator"
-  (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu")
-       (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT
-			 && (TARGET_FPA || TARGET_VFP)")
-            (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
+  (and (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
+		    unordered,ordered,unlt,unle,unge,ungt")
+       (match_test "maybe_get_arm_condition_code (op) != ARM_NV")))
 
 (define_special_predicate "lt_ge_comparison_operator"
   (match_code "lt,ge"))

=== added file 'gcc/testsuite/gcc.dg/torture/pr49030.c'
--- gcc/testsuite/gcc.dg/torture/pr49030.c	1970-01-01 00:00:00 +0000
+++ gcc/testsuite/gcc.dg/torture/pr49030.c	2011-09-05 10:33:49 +0000
@@ -0,0 +1,19 @@
+void
+sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples,
+		       unsigned long dst_skip)
+{
+  long long y;
+  while (nsamples--)
+    {
+      y = (long long) (*src * 8388608.0f) << 8;
+      if (y > 2147483647) {
+	*(int *) dst = 2147483647;
+      } else if (y < -2147483647 - 1) {
+	*(int *) dst = -2147483647 - 1;
+      } else {
+	*(int *) dst = (int) y;
+      }
+      dst += dst_skip;
+      src++;
+    }
+}