Merge lp:~rsandifo/gcc-linaro/lp-710652-4.5 into lp:gcc-linaro/4.5

[Richard Sandiford]

Posted upstream as:

http://gcc.gnu.org/ml/gcc-patches/2011-01/msg02266.html

However, because the bug isn't a regression, the patch isn't
suitable for FSF 4.6 at this stage. There's also little real
chance of an upstream review until Richard gets back from
sabbatical.

[Andrew Stubbs (ams-codesourcery)]

Applied and tested with no regressions. Approved.

review: Approve

=== modified file 'ChangeLog.linaro'
--- ChangeLog.linaro	2011-02-01 16:09:12 +0000
+++ ChangeLog.linaro	2011-02-02 14:18:41 +0000
@@ -1,3 +1,13 @@
[phone]  Richard Sandiford  <[e-mail]>
+
+
+	gcc/testsuite/
+	PR target/47553
+	* gcc.target/arm/neon-vld-1.c: New test.
+	gcc/
+	PR target/47553
+	* config/arm/predicates.md (neon_lane_number): Accept 0..15.
+
 2010-01-25  Tom de Vries  <[e-mail]>
 
 	gcc/

=== modified file 'gcc/config/arm/predicates.md'
--- gcc/config/arm/predicates.md	2011-01-13 16:06:19 +0000
+++ gcc/config/arm/predicates.md	2011-02-02 14:18:41 +0000
@@ -563,7 +563,7 @@
 ;; TODO: We could check lane numbers more precisely based on the mode.
 (define_predicate "neon_lane_number"
   (and (match_code "const_int")
-       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
+       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
 ;; Predicates for named expanders that overlap multiple ISAs.
 
 (define_predicate "cmpdi_operand"

=== added file 'gcc/testsuite/gcc.target/arm/neon-vld-1.c'
--- gcc/testsuite/gcc.target/arm/neon-vld-1.c	1970-01-01 00:00:00 +0000
+++ gcc/testsuite/gcc.target/arm/neon-vld-1.c	2011-02-02 14:18:41 +0000
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O1" } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+uint8x16_t
+foo (uint8_t *a, uint8x16_t b)
+{
+  vst1q_lane_u8 (a, b, 14);
+  return vld1q_lane_u8 (a + 0x100, b, 15);
+}