lp:ipxe

Created by Peter J. Mello and last modified
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Owner:
Peter J. Mello
Project:
iPXE
Status:
Development

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Recent revisions

6107. By Michael Brown <email address hidden>

[ena] Assign memory BAR if left empty by BIOS

Some BIOSes in AWS EC2 (observed with a c6i.metal instance in
eu-west-2) will fail to assign an MMIO address to the ENA device,
which causes ioremap() to fail.

Experiments show that the ENA device is the only device behind its
bridge, even when multiple ENA devices are present, and that the BIOS
does assign a memory window to the bridge.

We may therefore choose to assign the device an MMIO address at the
start of the bridge's memory window.

Signed-off-by: Michael Brown <email address hidden>

6106. By Michael Brown <email address hidden>

[pci] Add minimal PCI bridge driver

Add a minimal driver for PCI bridges that can be used to locate the
bridge to which a PCI device is attached.

Signed-off-by: Michael Brown <email address hidden>

6105. By Michael Brown <email address hidden>

[pci] Select PCI I/O API at runtime for cloud images

Pretty much all physical machines and off-the-shelf virtual machines
will provide a functional PCI BIOS. We therefore default to using
only the PCI BIOS, with no fallback to an alternative mechanism if the
PCI BIOS fails.

AWS EC2 provides the opportunity to experience some exceptions to this
rule. For example, the t3a.nano instances in eu-west-1 have no
functional PCI BIOS at all. As of commit 83516ba ("[cloud] Use
PCIAPI_DIRECT for cloud images") we therefore use direct Type 1
configuration space accesses in the images built and published for use
in the cloud.

Recent experience has discovered yet more variation in AWS EC2
instances. For example, some of the metal instance types have
multiple PCI host bridges and the direct Type 1 accesses therefore
see only a subset of the PCI devices.

Attempt to accommodate future such variations by making the PCI I/O
API selectable at runtime and choosing ECAM (if available), falling
back to the PCI BIOS (if available), then finally falling back to
direct Type 1 accesses.

This is implemented as a dedicated PCIAPI_CLOUD API, rather than by
having the PCI core select a suitable API at runtime (as was done for
timers in commit 302f1ee ("[time] Allow timer to be selected at
runtime"). The common case will remain that only the PCI BIOS API is
required, and we would prefer to retain the optimisations that come
from inlining the configuration space accesses in this common case.
Cloud images are (at present) disk images rather than ROM images, and
so the increased code size required for this design approach in the
PCIAPI_CLOUD case is acceptable.

Signed-off-by: Michael Brown <email address hidden>

6104. By Michael Brown <email address hidden>

[bios] Allow pcibios_discover() to return an empty range

Allow pcibios_discover() to return an empty range if the INT 1A,B101
PCI BIOS installation check call fails.

Signed-off-by: Michael Brown <email address hidden>

6103. By Michael Brown <email address hidden>

[pci] Add support for the Enhanced Configuration Access Mechanism (ECAM)

The ACPI MCFG table describes a direct mapping of PCI configuration
space into MMIO space. This mapping allows access to extended
configuration space (up to 4096 bytes) and also provides for the
existence of multiple host bridges.

Add support for the ECAM mechanism described by the ACPI MCFG table,
as a selectable PCI I/O API alongside the existing PCI BIOS and Type 1
mechanisms.

Signed-off-by: Michael Brown <email address hidden>

6102. By Michael Brown <email address hidden>

[pci] Generalise pci_num_bus() to pci_discover()

Allow pci_find_next() to discover devices beyond the first PCI
segment, by generalising pci_num_bus() (which implicitly assumes that
there is only a single PCI segment) with pci_discover() (which has the
ability to return an arbitrary contiguous chunk of PCI bus:dev.fn
address space).

Signed-off-by: Michael Brown <email address hidden>

6101. By Michael Brown <email address hidden>

[pci] Check for wraparound in callers of pci_find_next()

The semantics of the bus:dev.fn parameter passed to pci_find_next()
are "find the first existent PCI device at this address or higher",
with the caller expected to increment the address between finding
devices. This does not allow the parameter to distinguish between the
two cases "start from address zero" and "wrapped after incrementing
maximal possible address", which could therefore lead to an infinite
loop in the degenerate case that a device with address ffff:ff:1f.7
really exists.

Fix by checking for wraparound in the caller (which is already
responsible for performing the increment).

Signed-off-by: Michael Brown <email address hidden>

6100. By Michael Brown <email address hidden>

[pci] Allow pci_find_next() to return non-zero PCI segments

Separate the return status code from the returned PCI bus:dev.fn
address, in order to allow pci_find_next() to be used to find devices
with a non-zero PCI segment number.

Signed-off-by: Michael Brown <email address hidden>

6099. By Michael Brown <email address hidden>

[linux] Add missing PROVIDE_PCIAPI_INLINE() macros

Ensure type consistency of the PCI I/O API methods by adding the
missing PROVIDE_PCIAPI_INLINE() macros.

Signed-off-by: Michael Brown <email address hidden>

6098. By Michael Brown <email address hidden>

[ipv6] Ignore SLAAC on prefixes with an incompatible prefix length

Experience suggests that routers are often misconfigured to advertise
SLAAC even on prefixes that do not have a SLAAC-compatible prefix
length. iPXE will currently treat this as an error, resulting in the
prefix being ignored completely.

Handle this misconfiguration by ignoring the autonomous address flag
when the prefix length is unsuitable for SLAAC.

Reported-by: Malte Janduda <email address hidden>
Signed-off-by: Michael Brown <email address hidden>

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