1. Add support to count MN hardware events.
2. Mn events are listed in sysfs at /sys/devices/hisi_mn_2/events/
The events can be selected as shown in perf list
e.g.: For MN_READ_REQUEST event for Super CPU cluster 2 the
event format is -e "hisi_mn_2/read_req/"
3. MN PMU doesnot support counter overflow IRQ in HiP05/06/07, So
use hrtimer to poll and avoid counter overflow.
Signed-off-by: Shaokun Zhang <email address hidden>
Signed-off-by: Dikshit N <email address hidden>
Signed-off-by: Anurup M <email address hidden>
(v7 submission)
UBUNTU: SAUCE: drivers: perf: hisi: Add support for Hisilicon SoC event counters
1. HiP05/06/07 uncore PMU to support different hardware event counters.
2. Hisilicon PMU shall use the DJTAG hardware interface to access
hardware event counters and configuration register.
3. Routines to enable/disable/add/del/start/stop hardware event counting.
4. Add support to count L3 cache hardware events. Each L3 cache banks will
be registered as separate PMU with perf.
5. L3C events will be listed at /sys/devices/hisi_l3cX_Y/events/
6. L3C PMU in HiP05/06/07 does not support counter overflow IRQ. So hrtimer
is used to poll and avoid overflow.
Signed-off-by: Anurup M <email address hidden>
Signed-off-by: Shaokun Zhang <email address hidden>
Signed-off-by: John Garry <email address hidden>
(v7 submission)
UBUNTU: SAUCE: drivers: perf: hisi: Add support for Hisilicon Djtag driver
The Hisilicon Djtag is an independent component which connects
with some other components in the SoC by Debug Bus. This driver
can be configured to access the registers of connecting components
(like L3 cache) during real time debugging.
Signed-off-by: Tan Xiaojun <email address hidden>
Signed-off-by: John Garry <email address hidden>
Signed-off-by: Anurup M <email address hidden>
(v7 submission)
Documentation for perf usage and Hisilicon SoC PMU uncore events.
The Hisilicon SOC has event counters for hardware modules like
L3 cache, Miscellaneous node etc. These events are all uncore.
1) Device tree bindings for Hisilicon SoC PMU.
2) Add example for Hisilicon L3 cache and MN PMU.
3) Add child nodes of L3C and MN in djtag bindings example.
