Merge ~paelzer/ubuntu/+source/qemu:lp-2011832-emulation-issues-lp-1999885-tod-in-pv-JAMMY into ubuntu/+source/qemu:ubuntu/jammy-devel

[Christian Ehrhardt ]

[Christian Ehrhardt  (paelzer)]

PPA: https://launchpad.net/~paelzer/+archive/ubuntu/lp-2011832-emulation-issues-lp-1999885-tod-in-pv-sruprep

[Miriam España Acebal (mirespace)]

* Changelog checked ...OK
  - version: OK
  - series: OK
  - Entries: OK
    + All files reflected ... OK
    + Size... OK (the patch's name is so large that exceeds 80 characters... but life happens).

* Patches... OK
   - Patches present in series file ... OK
   - DEP-3 Headers in patches present ... OK
     + Required fields present (Description/subject, Origin or Author)...OK
     + Field bug-ubuntu ...OK

* The package builds... OK
  - no changes outside debian folder ... OK
  - in PPA... OK
  - install/uninstall ... OK (tested in the bug)
  - DEP8 test ... I cannot run it in https://autopkgtest.ubuntu.com/ :(
  - Fix the bug ... OK (tested in the bug)

* Git ...OK
   - changelog is the last commit ... OK
   - A commit per logical change... OK

* SRU paperwork ... OK
  - Steps to reproduce in place .. OK

Thanks for your work!

P.S.: The only thing is that the patch

ubuntu/lp-2011832-target-ppc-Fix-xs-max-min-cj-dp-to-use-VSX-registers.patch

is not being used in Kinetic. I only write this to notice it just in case it is not needed in the Kinetic version or is missed there.

review: Approve

[git-ubuntu bot (git-ubuntu-bot)]

Approvers: paelzer, mirespace
Uploaders: paelzer
MP auto-approved

review: Approve

[Christian Ehrhardt  (paelzer)]

The former SRUs cleared, now uploaded to -unapproved

diff --git a/debian/changelog b/debian/changelog
index 87128ee..89921af 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,11 @@
+qemu (1:6.2+dfsg-2ubuntu6.8) jammy; urgency=medium
+
+  * d/p/u/lp-1999885-s390x-tod-kvm-don-t-save-restore-the-TOD-in-PV-guest.patch:
+    avoid timer issues in s390x secure execution guests (LP: #1999885)
+  * d/p/u/lp-2011832-*: fix emulation issues in mips and powerpc (LP: #2011832)
+
+ -- Christian Ehrhardt <[e-mail]>  Thu, 23 Mar 2023 08:18:28 +0100
+
 qemu (1:6.2+dfsg-2ubuntu6.7) jammy; urgency=medium
 
   [ Brett Milford ]
diff --git a/debian/patches/series b/debian/patches/series
index 9283b19..e8c1d3d 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -52,3 +52,7 @@ CVE-2022-0216-2.patch
 CVE-2022-3165.patch
 ubuntu/lp1994002-migration-Read-state-once.patch
 ubuntu/lp2009048-vfio_map_dma_einval_amd_iommu_1tb.patch
+ubuntu/lp-1999885-s390x-tod-kvm-don-t-save-restore-the-TOD-in-PV-guest.patch
+ubuntu/lp-2011832-target-ppc-Fix-xs-max-min-cj-dp-to-use-VSX-registers.patch
+ubuntu/lp-2011832-target-mips-Fix-df_extract_val-and-df_extract_df-dfe.patch
+ubuntu/lp-2011832-target-mips-Fix-FTRUNC_S-and-FTRUNC_U-trans-helper.patch
diff --git a/debian/patches/ubuntu/lp-1999885-s390x-tod-kvm-don-t-save-restore-the-TOD-in-PV-guest.patch b/debian/patches/ubuntu/lp-1999885-s390x-tod-kvm-don-t-save-restore-the-TOD-in-PV-guest.patch
new file mode 100644
index 0000000..dc78dea
--- /dev/null
+++ b/debian/patches/ubuntu/lp-1999885-s390x-tod-kvm-don-t-save-restore-the-TOD-in-PV-guest.patch
@@ -0,0 +1,62 @@
+From 38621181ae3cbec62e3490fbc14f6ac01642d07a Mon Sep 17 00:00:00 2001
+From: Nico Boehr <[e-mail]>
+Date: Wed, 12 Oct 2022 14:32:29 +0200
+Subject: [PATCH] s390x/tod-kvm: don't save/restore the TOD in PV guests
+
+Under PV, the guest's TOD clock is under control of the ultravisor and the
+hypervisor cannot change it.
+
+With upcoming kernel changes[1], the Linux kernel will reject QEMU's
+request to adjust the guest's clock in this case, so don't attempt to set
+the clock.
+
+This avoids the following warning message on save/restore of a PV guest:
+
+warning: Unable to set KVM guest TOD clock: Operation not supported
+
+[1] https://lore.kernel.org/all/[e-mail]/
+
+Fixes: c3347ed0d2ee ("s390x: protvirt: Support unpack facility")
+Signed-off-by: Nico Boehr <[e-mail]>
+Message-Id: <[e-mail]>
+[thuth: Add curly braces]
+Signed-off-by: Thomas Huth <[e-mail]>
+
+Origin: upstream, https://gitlab.com/qemu-project/qemu/-/commit/38621181ae3
+Bug-Ubuntu: https://bugs.launchpad.net/bugs/1999885
+Last-Update: 2023-03-23
+
+---
+ hw/s390x/tod-kvm.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/hw/s390x/tod-kvm.c b/hw/s390x/tod-kvm.c
+index 9d0cbfbce2b..e2202dae2dc 100644
+--- a/hw/s390x/tod-kvm.c
++++ b/hw/s390x/tod-kvm.c
+@@ -13,6 +13,7 @@
+ #include "qemu/module.h"
+ #include "sysemu/runstate.h"
+ #include "hw/s390x/tod.h"
++#include "hw/s390x/pv.h"
+ #include "kvm/kvm_s390x.h"
+ 
+ static void kvm_s390_get_tod_raw(S390TOD *tod, Error **errp)
+@@ -84,6 +85,14 @@ static void kvm_s390_tod_vm_state_change(void *opaque, bool running,
+     S390TODState *td = opaque;
+     Error *local_err = NULL;
+ 
++    /*
++     * Under PV, the clock is under ultravisor control, hence we cannot restore
++     * it on resume.
++     */
++    if (s390_is_pv()) {
++        return;
++    }
++
+     if (running && td->stopped) {
+         /* Set the old TOD when running the VM - start the TOD clock. */
+         kvm_s390_set_tod_raw(&td->base, &local_err);
+-- 
+2.40.0
+
diff --git a/debian/patches/ubuntu/lp-2011832-target-mips-Fix-FTRUNC_S-and-FTRUNC_U-trans-helper.patch b/debian/patches/ubuntu/lp-2011832-target-mips-Fix-FTRUNC_S-and-FTRUNC_U-trans-helper.patch
new file mode 100644
index 0000000..9863740
--- /dev/null
+++ b/debian/patches/ubuntu/lp-2011832-target-mips-Fix-FTRUNC_S-and-FTRUNC_U-trans-helper.patch
@@ -0,0 +1,43 @@
+From 1d29f899e7f2ae9bd1bc3eb0c59e72fe932f53a6 Mon Sep 17 00:00:00 2001
+From: Ni Hui <[e-mail]>
+Date: Tue, 3 May 2022 22:42:41 +0800
+Subject: [PATCH] target/mips: Fix FTRUNC_S and FTRUNC_U trans helper
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Fix the FTRUNC_S and FTRUNC_U trans helper problem.
+
+Fixes: 5c5b64000c ("target/mips: Convert MSA 2RF instruction format to decodetree")
+Signed-off-by: nihui <[e-mail]>
+Reviewed-by: Richard Henderson <[e-mail]>
+Reviewed-by: Philippe Mathieu-Daudé <[e-mail]>
+Message-Id: <[e-mail]>
+Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
+
+Origin: upstream, https://gitlab.com/qemu-project/qemu/-/commit/1d29f899e7f
+Bug-Ubuntu: https://bugs.launchpad.net/bugs/2011832
+Last-Update: 2023-03-23
+
+---
+ target/mips/tcg/msa_translate.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
+index 0b3dd0957c2..1bcdbb11215 100644
+--- a/target/mips/tcg/msa_translate.c
++++ b/target/mips/tcg/msa_translate.c
+@@ -752,8 +752,8 @@ static bool trans_msa_2rf(DisasContext *ctx, arg_msa_r *a,
+ }
+ 
+ TRANS(FCLASS,   trans_msa_2rf, gen_helper_msa_fclass_df);
+-TRANS(FTRUNC_S, trans_msa_2rf, gen_helper_msa_fclass_df);
+-TRANS(FTRUNC_U, trans_msa_2rf, gen_helper_msa_ftrunc_s_df);
++TRANS(FTRUNC_S, trans_msa_2rf, gen_helper_msa_ftrunc_s_df);
++TRANS(FTRUNC_U, trans_msa_2rf, gen_helper_msa_ftrunc_u_df);
+ TRANS(FSQRT,    trans_msa_2rf, gen_helper_msa_fsqrt_df);
+ TRANS(FRSQRT,   trans_msa_2rf, gen_helper_msa_frsqrt_df);
+ TRANS(FRCP,     trans_msa_2rf, gen_helper_msa_frcp_df);
+-- 
+2.40.0
+
diff --git a/debian/patches/ubuntu/lp-2011832-target-mips-Fix-df_extract_val-and-df_extract_df-dfe.patch b/debian/patches/ubuntu/lp-2011832-target-mips-Fix-df_extract_val-and-df_extract_df-dfe.patch
new file mode 100644
index 0000000..6cb49c5
--- /dev/null
+++ b/debian/patches/ubuntu/lp-2011832-target-mips-Fix-df_extract_val-and-df_extract_df-dfe.patch
@@ -0,0 +1,54 @@
+From 7fc235c67f6c136ceba2305bcf2609c46a74620d Mon Sep 17 00:00:00 2001
+From: Ni Hui <[e-mail]>
+Date: Tue, 3 May 2022 21:07:06 +0800
+Subject: [PATCH] target/mips: Fix df_extract_val() and df_extract_df() dfe
+ lookup
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Actually look into dfe structure data so that df_extract_val() and
+df_extract_df() can return immediate and datafield other than BYTE.
+
+Fixes: 4701d23aef ("target/mips: Convert MSA BIT instruction format to decodetree")
+Signed-off-by: Ni Hui <[e-mail]>
+Reviewed-by: Richard Henderson <[e-mail]>
+Reviewed-by: Philippe Mathieu-Daudé <[e-mail]>
+Message-Id: <[e-mail]>
+Signed-off-by: Philippe Mathieu-Daudé <[e-mail]>
+
+Origin: upstream, https://gitlab.com/qemu-project/qemu/-/commit/7fc235c67f6
+Bug-Ubuntu: https://bugs.launchpad.net/bugs/2011832
+Last-Update: 2023-03-23
+
+---
+ target/mips/tcg/msa_translate.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
+index 76307102f29..aa45bae0aa5 100644
+--- a/target/mips/tcg/msa_translate.c
++++ b/target/mips/tcg/msa_translate.c
+@@ -68,8 +68,8 @@ struct dfe {
+ static int df_extract_val(DisasContext *ctx, int x, const struct dfe *s)
+ {
+     for (unsigned i = 0; i < 4; i++) {
+-        if (extract32(x, s->start, s->length) == s->mask) {
+-            return extract32(x, 0, s->start);
++        if (extract32(x, s[i].start, s[i].length) == s[i].mask) {
++            return extract32(x, 0, s[i].start);
+         }
+     }
+     return -1;
+@@ -82,7 +82,7 @@ static int df_extract_val(DisasContext *ctx, int x, const struct dfe *s)
+ static int df_extract_df(DisasContext *ctx, int x, const struct dfe *s)
+ {
+     for (unsigned i = 0; i < 4; i++) {
+-        if (extract32(x, s->start, s->length) == s->mask) {
++        if (extract32(x, s[i].start, s[i].length) == s[i].mask) {
+             return i;
+         }
+     }
+-- 
+2.40.0
+
diff --git a/debian/patches/ubuntu/lp-2011832-target-ppc-Fix-xs-max-min-cj-dp-to-use-VSX-registers.patch b/debian/patches/ubuntu/lp-2011832-target-ppc-Fix-xs-max-min-cj-dp-to-use-VSX-registers.patch
new file mode 100644
index 0000000..a49dbbd
--- /dev/null
+++ b/debian/patches/ubuntu/lp-2011832-target-ppc-Fix-xs-max-min-cj-dp-to-use-VSX-registers.patch
@@ -0,0 +1,94 @@
+From 201fc774e0e1cc76ec23b595968004a7b14fb6e8 Mon Sep 17 00:00:00 2001
+From: Victor Colombo <[e-mail]>
+Date: Fri, 17 Dec 2021 17:57:18 +0100
+Subject: [PATCH] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+PPC instruction xsmaxcdp, xsmincdp, xsmaxjdp, and xsminjdp are using
+vector registers when they should be using VSX ones. This happens
+because the instructions are using GEN_VSX_HELPER_R3, which adds 32
+to the register numbers, effectively making them vector registers.
+
+This patch fixes it by changing these instructions to use
+GEN_VSX_HELPER_X3.
+
+Reviewed-by: Richard Henderson <[e-mail]>
+Signed-off-by: Victor Colombo <[e-mail]>
+Message-Id: <[e-mail]>
+Signed-off-by: Cédric Le Goater <[e-mail]>
+
+Origin: upstream, https://gitlab.com/qemu-project/qemu/-/commit/201fc774e0e
+Bug-Ubuntu: https://bugs.launchpad.net/bugs/2011832
+Last-Update: 2023-03-22
+
+---
+ target/ppc/fpu_helper.c             | 4 ++--
+ target/ppc/helper.h                 | 8 ++++----
+ target/ppc/translate/vsx-impl.c.inc | 8 ++++----
+ 3 files changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
+index 1e9a1615403..d144f21dc04 100644
+--- a/target/ppc/fpu_helper.c
++++ b/target/ppc/fpu_helper.c
+@@ -2495,7 +2495,7 @@ VSX_MAX_MIN(xvmindp, minnum, 2, float64, VsrD(i))
+ VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i))
+ 
+ #define VSX_MAX_MINC(name, max)                                               \
+-void helper_##name(CPUPPCState *env, uint32_t opcode,                         \
++void helper_##name(CPUPPCState *env,                                          \
+                    ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)               \
+ {                                                                             \
+     ppc_vsr_t t = *xt;                                                        \
+@@ -2530,7 +2530,7 @@ VSX_MAX_MINC(xsmaxcdp, 1);
+ VSX_MAX_MINC(xsmincdp, 0);
+ 
+ #define VSX_MAX_MINJ(name, max)                                               \
+-void helper_##name(CPUPPCState *env, uint32_t opcode,                         \
++void helper_##name(CPUPPCState *env,                                          \
+                    ppc_vsr_t *xt, ppc_vsr_t *xa, ppc_vsr_t *xb)               \
+ {                                                                             \
+     ppc_vsr_t t = *xt;                                                        \
+diff --git a/target/ppc/helper.h b/target/ppc/helper.h
+index 72b2c70ac1f..fb946dc9742 100644
+--- a/target/ppc/helper.h
++++ b/target/ppc/helper.h
+@@ -403,10 +403,10 @@ DEF_HELPER_4(xscmpoqp, void, env, i32, vsr, vsr)
+ DEF_HELPER_4(xscmpuqp, void, env, i32, vsr, vsr)
+ DEF_HELPER_4(xsmaxdp, void, env, vsr, vsr, vsr)
+ DEF_HELPER_4(xsmindp, void, env, vsr, vsr, vsr)
+-DEF_HELPER_5(xsmaxcdp, void, env, i32, vsr, vsr, vsr)
+-DEF_HELPER_5(xsmincdp, void, env, i32, vsr, vsr, vsr)
+-DEF_HELPER_5(xsmaxjdp, void, env, i32, vsr, vsr, vsr)
+-DEF_HELPER_5(xsminjdp, void, env, i32, vsr, vsr, vsr)
++DEF_HELPER_4(xsmaxcdp, void, env, vsr, vsr, vsr)
++DEF_HELPER_4(xsmincdp, void, env, vsr, vsr, vsr)
++DEF_HELPER_4(xsmaxjdp, void, env, vsr, vsr, vsr)
++DEF_HELPER_4(xsminjdp, void, env, vsr, vsr, vsr)
+ DEF_HELPER_3(xscvdphp, void, env, vsr, vsr)
+ DEF_HELPER_4(xscvdpqp, void, env, i32, vsr, vsr)
+ DEF_HELPER_3(xscvdpsp, void, env, vsr, vsr)
+diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
+index c0e38060b45..02df75339ed 100644
+--- a/target/ppc/translate/vsx-impl.c.inc
++++ b/target/ppc/translate/vsx-impl.c.inc
+@@ -1098,10 +1098,10 @@ GEN_VSX_HELPER_R2_AB(xscmpoqp, 0x04, 0x04, 0, PPC2_VSX)
+ GEN_VSX_HELPER_R2_AB(xscmpuqp, 0x04, 0x14, 0, PPC2_VSX)
+ GEN_VSX_HELPER_X3(xsmaxdp, 0x00, 0x14, 0, PPC2_VSX)
+ GEN_VSX_HELPER_X3(xsmindp, 0x00, 0x15, 0, PPC2_VSX)
+-GEN_VSX_HELPER_R3(xsmaxcdp, 0x00, 0x10, 0, PPC2_ISA300)
+-GEN_VSX_HELPER_R3(xsmincdp, 0x00, 0x11, 0, PPC2_ISA300)
+-GEN_VSX_HELPER_R3(xsmaxjdp, 0x00, 0x12, 0, PPC2_ISA300)
+-GEN_VSX_HELPER_R3(xsminjdp, 0x00, 0x12, 0, PPC2_ISA300)
++GEN_VSX_HELPER_X3(xsmaxcdp, 0x00, 0x10, 0, PPC2_ISA300)
++GEN_VSX_HELPER_X3(xsmincdp, 0x00, 0x11, 0, PPC2_ISA300)
++GEN_VSX_HELPER_X3(xsmaxjdp, 0x00, 0x12, 0, PPC2_ISA300)
++GEN_VSX_HELPER_X3(xsminjdp, 0x00, 0x12, 0, PPC2_ISA300)
+ GEN_VSX_HELPER_X2(xscvdphp, 0x16, 0x15, 0x11, PPC2_ISA300)
+ GEN_VSX_HELPER_X2(xscvdpsp, 0x12, 0x10, 0, PPC2_VSX)
+ GEN_VSX_HELPER_R2(xscvdpqp, 0x04, 0x1A, 0x16, PPC2_ISA300)
+-- 
+2.40.0
+