Merge lp:~linaro-toolchain-dev/gcc-linaro/64bitatomics into lp:gcc-linaro/4.6
Status: | Merged |
---|---|
Approved by: | Ramana Radhakrishnan |
Approved revision: | not available |
Merge reported by: | Dr. David Alan Gilbert |
Merged at revision: | not available |
Proposed branch: | lp:~linaro-toolchain-dev/gcc-linaro/64bitatomics |
Merge into: | lp:gcc-linaro/4.6 |
To merge this branch: | bzr merge lp:~linaro-toolchain-dev/gcc-linaro/64bitatomics |
Related bugs: |
Reviewer | Review Type | Date Requested | Status |
---|---|---|---|
Linaro Toolchain Developers | Pending | ||
Review via email: mp+79428@code.launchpad.net |
Description of the change
This is a set of patches relating to ARM atomic operations;
1) Correct the definition of TARGET_HAVE_DMB_MCR so that it doesn't
produce the mcr instruction in Thumb1 (and enable on ARMv6 not just 6k
as per the docs).
2) Fix pr48126 which is a misplaced barrier in the atomic generation
3) Provide 64 bit atomic operations using the new ldrexd/strexd in ARMv6k
and above.
4) Provide fallbacks so that when compiled for earlier CPUs a Linux kernel
asssist is called (as per 32bit and smaller ops)
5) Add test cases and support for those test cases, for the operations
added in (3) and (4).
This is a backport from gcc svn of rev r19979-r19983 for Linaro spec
https:/
Dave
cbuild has taken a snapshot of this branch at r106830 and queued it for build.
The diff against the ancestor r106825 is available at: builds. linaro. org/toolchain/ snapshots/ gcc-linaro- 4.6+bzr106830~ davidgil- uk~64bitatomics .diff
http://
and will be built on the following builders:
a9-builder armv5-builder i686 x86_64
You can track the build queue at: ex.seabright. co.nz/helpers/ scheduler
http://
cbuild-snapshot: gcc-linaro- 4.6+bzr106830~ davidgil- uk~64bitatomics
cbuild-ancestor: lp:gcc-linaro+bzr106825
cbuild-state: check