/** @file
*
*  Copyright (c) 2012, ARM Limited. All rights reserved.
*  
*  This program and the accompanying materials                          
*  are licensed and made available under the terms and conditions of the BSD License         
*  which accompanies this distribution.  The full text of the license may be found at        
*  http://opensource.org/licenses/bsd-license.php                                            
*
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
*
**/

#ifndef __ARM_CACHE_COHERENT_INTERCONNECT_H__
#define __ARM_CACHE_COHERENT_INTERCONNECT_H__

BOOLEAN
ArmCacheCoherentInterconnectIsEnabled (
  IN UINTN SlaveInterfaceIndex
  );

VOID
ArmCacheCoherentInterconnectEnable (
  IN UINTN SlaveInterfaceIndex
  );

VOID
ArmCacheCoherentInterconnectDisable (
  IN UINTN SlaveInterfaceIndex
  );

#endif
