Merge lp:~kwerner/gcc-linaro/lp-681138-4.5 into lp:gcc-linaro/4.5

Proposed by Ken Werner
Status: Merged
Merged at revision: 99464
Proposed branch: lp:~kwerner/gcc-linaro/lp-681138-4.5
Merge into: lp:gcc-linaro/4.5
Diff against target: 165 lines (+68/-12)
3 files modified
ChangeLog.linaro (+12/-0)
gcc/config/arm/arm.c (+40/-4)
gcc/config/arm/sync.md (+16/-8)
To merge this branch: bzr merge lp:~kwerner/gcc-linaro/lp-681138-4.5
Reviewer Review Type Date Requested Status
Linaro Toolchain Developers Pending
Review via email: mp+45707@code.launchpad.net

Description of the change

Fixes LP #681138.

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1=== modified file 'ChangeLog.linaro'
2--- ChangeLog.linaro 2011-01-07 11:49:15 +0000
3+++ ChangeLog.linaro 2011-01-10 17:49:33 +0000
4@@ -1,3 +1,15 @@
5+2011-01-10 Ken Werner <ken.werner@de.ibm.com>
6+
7+ LP: #681138
8+ Backport from mainline:
9+
10+ gcc/
11+ * config/arm/sync.md (sync_clobber, sync_t2_reqd): New code attribute.
12+ (arm_sync_old_<sync_optab>si, arm_sync_old_<sync_optab><mode>): Use
13+ the sync_clobber and sync_t2_reqd code attributes.
14+ * config/arm/arm.c (arm_output_sync_loop): Reverse the operation if
15+ the t2 argument is NULL.
16+
17 2011-01-07 Andrew Stubbs <ams@codesourcery.com>
18
19 gcc/
20
21=== modified file 'gcc/config/arm/arm.c'
22--- gcc/config/arm/arm.c 2011-01-05 18:20:37 +0000
23+++ gcc/config/arm/arm.c 2011-01-10 17:49:33 +0000
24@@ -23377,10 +23377,46 @@
25 break;
26 }
27
28- arm_output_strex (emit, mode, "", t2, t1, memory);
29- operands[0] = t2;
30- arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
31- arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
32+ if (t2)
33+ {
34+ arm_output_strex (emit, mode, "", t2, t1, memory);
35+ operands[0] = t2;
36+ arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
37+ arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
38+ LOCAL_LABEL_PREFIX);
39+ }
40+ else
41+ {
42+ /* Use old_value for the return value because for some operations
43+ the old_value can easily be restored. This saves one register. */
44+ arm_output_strex (emit, mode, "", old_value, t1, memory);
45+ operands[0] = old_value;
46+ arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
47+ arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
48+ LOCAL_LABEL_PREFIX);
49+
50+ switch (sync_op)
51+ {
52+ case SYNC_OP_ADD:
53+ arm_output_op3 (emit, "sub", old_value, t1, new_value);
54+ break;
55+
56+ case SYNC_OP_SUB:
57+ arm_output_op3 (emit, "add", old_value, t1, new_value);
58+ break;
59+
60+ case SYNC_OP_XOR:
61+ arm_output_op3 (emit, "eor", old_value, t1, new_value);
62+ break;
63+
64+ case SYNC_OP_NONE:
65+ arm_output_op2 (emit, "mov", old_value, required_value);
66+ break;
67+
68+ default:
69+ gcc_unreachable ();
70+ }
71+ }
72
73 arm_process_output_memory_barrier (emit, NULL);
74 arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
75
76=== modified file 'gcc/config/arm/sync.md'
77--- gcc/config/arm/sync.md 2010-09-13 15:39:11 +0000
78+++ gcc/config/arm/sync.md 2011-01-10 17:49:33 +0000
79@@ -103,6 +103,18 @@
80 (plus "add")
81 (minus "sub")])
82
83+(define_code_attr sync_clobber [(ior "=&r")
84+ (and "=&r")
85+ (xor "X")
86+ (plus "X")
87+ (minus "X")])
88+
89+(define_code_attr sync_t2_reqd [(ior "4")
90+ (and "4")
91+ (xor "*")
92+ (plus "*")
93+ (minus "*")])
94+
95 (define_expand "sync_<sync_optab>si"
96 [(match_operand:SI 0 "memory_operand")
97 (match_operand:SI 1 "s_register_operand")
98@@ -286,7 +298,6 @@
99 VUNSPEC_SYNC_COMPARE_AND_SWAP))
100 (set (match_dup 1) (unspec_volatile:SI [(match_dup 2)]
101 VUNSPEC_SYNC_COMPARE_AND_SWAP))
102- (clobber:SI (match_scratch:SI 4 "=&r"))
103 (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
104 VUNSPEC_SYNC_COMPARE_AND_SWAP))
105 ]
106@@ -299,7 +310,6 @@
107 (set_attr "sync_required_value" "2")
108 (set_attr "sync_new_value" "3")
109 (set_attr "sync_t1" "0")
110- (set_attr "sync_t2" "4")
111 (set_attr "conds" "clob")
112 (set_attr "predicable" "no")])
113
114@@ -313,7 +323,6 @@
115 VUNSPEC_SYNC_COMPARE_AND_SWAP)))
116 (set (match_dup 1) (unspec_volatile:NARROW [(match_dup 2)]
117 VUNSPEC_SYNC_COMPARE_AND_SWAP))
118- (clobber:SI (match_scratch:SI 4 "=&r"))
119 (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
120 VUNSPEC_SYNC_COMPARE_AND_SWAP))
121 ]
122@@ -326,7 +335,6 @@
123 (set_attr "sync_required_value" "2")
124 (set_attr "sync_new_value" "3")
125 (set_attr "sync_t1" "0")
126- (set_attr "sync_t2" "4")
127 (set_attr "conds" "clob")
128 (set_attr "predicable" "no")])
129
130@@ -487,7 +495,7 @@
131 VUNSPEC_SYNC_OLD_OP))
132 (clobber (reg:CC CC_REGNUM))
133 (clobber (match_scratch:SI 3 "=&r"))
134- (clobber (match_scratch:SI 4 "=&r"))]
135+ (clobber (match_scratch:SI 4 "<sync_clobber>"))]
136 "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
137 {
138 return arm_output_sync_insn (insn, operands);
139@@ -496,7 +504,7 @@
140 (set_attr "sync_memory" "1")
141 (set_attr "sync_new_value" "2")
142 (set_attr "sync_t1" "3")
143- (set_attr "sync_t2" "4")
144+ (set_attr "sync_t2" "<sync_t2_reqd>")
145 (set_attr "sync_op" "<sync_optab>")
146 (set_attr "conds" "clob")
147 (set_attr "predicable" "no")])
148@@ -540,7 +548,7 @@
149 VUNSPEC_SYNC_OLD_OP))
150 (clobber (reg:CC CC_REGNUM))
151 (clobber (match_scratch:SI 3 "=&r"))
152- (clobber (match_scratch:SI 4 "=&r"))]
153+ (clobber (match_scratch:SI 4 "<sync_clobber>"))]
154 "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
155 {
156 return arm_output_sync_insn (insn, operands);
157@@ -549,7 +557,7 @@
158 (set_attr "sync_memory" "1")
159 (set_attr "sync_new_value" "2")
160 (set_attr "sync_t1" "3")
161- (set_attr "sync_t2" "4")
162+ (set_attr "sync_t2" "<sync_t2_reqd>")
163 (set_attr "sync_op" "<sync_optab>")
164 (set_attr "conds" "clob")
165 (set_attr "predicable" "no")])

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