Violating S3.2
Text fields should use common size of 50mils, but labels and numbers may use text size as low as
20mil if required
- Field U at posx -1050 posy 2550 size 60
- Field M2GL090T-FG484 at posx -450 posy 2450 size 60
Violating S4.6
Unused pins should be set as NOT CONNECTED and should be INVISIBLE
NC pins are VISIBLE (should be INVISIBLE):
- Pin NC (T11) @ (-1300,400) should be INVISIBLE
- Pin NC (T12) @ (-1300,300) should be INVISIBLE
Violating S5.2
Footprint filters should match all appropriate footprints
Footprint filter 'BGA?484?23.0x23.0mm?Layout22x22?P1.0mm' not correctly formatted
- Does not contain wildcard ('*') character
* recentre unitC
* Additional footprint wildcard
* Update M2GL090T-FG484 as per review comments
**Unit A:**
- [x] All DDRIOxxxx pins are Bidirectional
- [x]For pin on the right, the main function should be near to the outline border. The name need to be swapped. For example "DDRIO77PB1/GB12/CCC_NE1_CLKI2/MDDR_DQ12" becomes "MDDR_DQ12/CCC_NE1_CLKI2/GB12DDRIO77PB1", etc
You can reduce the height of t he symbol
**Unit B:**
- [x] You can reduce the height of t he symbol
**Unit C:**
- [x] For pin on the right, the main function should be near to the outline border.
You should center VDDI3 pins
**Unit D:**
- [x] You can reduce the height of t he symbol
- [x] I propose to put all JTAG pins on the same side if this is easier to wire on the schematic
**Unit G:**
- [x]Positions of pins M8 and N8 are crossed (MSIOD188NB7 and MSIOD188PB7)
**Unit F:**
- [x] You can reduce the height of t he symbol
**Unit H:**
- [x] Positions of pins H3 and G3 are crossed (MSIO154NB8 and MSIO154PB8)
- [x] For pin on the right, the main function should be near to the outline border.
- [x]You can reduce the height of the symbol by 100mil
**Unit I:**
- [x] You should align VDD with VSS and VPPNVM with VSSNVM
**Additional**
Setting D21 to input only as this is an MSI as oppose to an MSIO
* re-centre banks D and F. Size grown to ensure symmetry
