~kamalmostafa/ubuntu/+source/linux/+git/bionic:lp1752828-nfp

Last commit made on 2018-03-27
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Branch merges

Branch information

Name:
lp1752828-nfp
Repository:
lp:~kamalmostafa/ubuntu/+source/linux/+git/bionic

Recent commits

a22bcf6... by Jakub Kicinski <email address hidden>

nfp: forbid disabling hw-tc-offload on representors while offload active

BugLink: http://bugs.launchpad.net/bugs/1752828

All netdevs which can accept TC offloads must implement
.ndo_set_features(). nfp_reprs currently do not do that, which
means hw-tc-offload can be turned on and off even when offloads
are active.

Whether the offloads are active is really a question to nfp_ports,
so remove the per-app tc_busy callback indirection thing, and
simply count the number of offloaded items in nfp_port structure.

Fixes: 8a2768732a4d ("nfp: provide infrastructure for offloading flower based TC filters")
Signed-off-by: Jakub Kicinski <email address hidden>
Reviewed-by: Simon Horman <email address hidden>
Tested-by: Pieter Jansen van Vuuren <email address hidden>
Signed-off-by: David S. Miller <email address hidden>
(back-ported from commit d692403e5cf8008f31f5664a6f3ce3e65d54f458)
Signed-off-by: Kamal Mostafa <email address hidden>

572767c... by Jakub Kicinski <email address hidden>

nfp: don't advertise hw-tc-offload on non-port netdevs

BugLink: http://bugs.launchpad.net/bugs/1752828

nfp_port is a structure which represents an ASIC port, both
PCIe vNIC (on a PF or a VF) or the external MAC port. vNIC
netdev (struct nfp_net) and pure representor netdev (struct
nfp_repr) both have a pointer to this structure. nfp_reprs
always have a port associated. nfp_nets, however, only represent
a device port in legacy mode, where they are considered the
MAC port. In switchdev mode they are just the CPU's side of
the PCIe link.

By definition TC offloads only apply to device ports. Don't
set the flag on vNICs without a port (i.e. in switchdev mode).

Signed-off-by: Jakub Kicinski <email address hidden>
Reviewed-by: Simon Horman <email address hidden>
Tested-by: Pieter Jansen van Vuuren <email address hidden>
Signed-off-by: David S. Miller <email address hidden>
(cherry picked from commit 0b9de4ca853b6ba2c92ff0b4602281001b166639)
Signed-off-by: Kamal Mostafa <email address hidden>

1fe63d9... by Jakub Kicinski <email address hidden>

nfp: bpf: require ETH table

BugLink: http://bugs.launchpad.net/bugs/1752828

Upcoming changes will require all netdevs supporting TC offloads
to have a full struct nfp_port. Require those for BPF offload.
The operation without management FW reporting information about
Ethernet ports is something we only support for very old and very
basic NIC firmwares anyway.

Signed-off-by: Jakub Kicinski <email address hidden>
Reviewed-by: Simon Horman <email address hidden>
Tested-by: Pieter Jansen van Vuuren <email address hidden>
Signed-off-by: David S. Miller <email address hidden>
(back-ported from commit e3ac6c0737e2b17bf11210e3fd66565e9b818b87)
Signed-off-by: Kamal Mostafa <email address hidden>

35645ff... by Paul Mackerras <email address hidden>

KVM: PPC: Book3S HV: Fix duplication of host SLB entries

BugLink: http://bugs.launchpad.net/bugs/1759045

Since commit 6964e6a4e489 ("KVM: PPC: Book3S HV: Do SLB load/unload
with guest LPCR value loaded", 2018-01-11), we have been seeing
occasional machine check interrupts on POWER8 systems when running
KVM guests, due to SLB multihit errors.

This turns out to be due to the guest exit code reloading the host
SLB entries from the SLB shadow buffer when the SLB was not previously
cleared in the guest entry path. This can happen because the path
which skips from the guest entry code to the guest exit code without
entering the guest now does the skip before the SLB is cleared and
loaded with guest values, but the host values are loaded after the
point in the guest exit path that we skip to.

To fix this, we move the code that reloads the host SLB values up
so that it occurs just before the point in the guest exit code (the
label guest_bypass:) where we skip to from the guest entry path.

Reported-by: Alexey Kardashevskiy <email address hidden>
Fixes: 6964e6a4e489 ("KVM: PPC: Book3S HV: Do SLB load/unload with guest LPCR value loaded")
Tested-by: Alexey Kardashevskiy <email address hidden>
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit cda4a14733138b8f15b0b69d97ec198dc41eccae linux-next)
Signed-off-by: Seth Forshee <email address hidden>

de424c6... by Paul Mackerras <email address hidden>

KVM: PPC: Book3S HV: Fix trap number return from __kvmppc_vcore_entry

BugLink: http://bugs.launchpad.net/bugs/1759045

This fixes a bug where the trap number that is returned by
__kvmppc_vcore_entry gets corrupted. The effect of the corruption
is that IPIs get ignored on POWER9 systems when the IPI is sent via
a doorbell interrupt to a CPU which is executing in a KVM guest.
The effect of the IPI being ignored is often that another CPU locks
up inside smp_call_function_many() (and if that CPU is holding a
spinlock, other CPUs then lock up inside raw_spin_lock()).

The trap number is currently held in register r12 for most of the
assembly-language part of the guest exit path. In that path, we
call kvmppc_subcore_exit_guest(), which is a C function, without
restoring r12 afterwards. Depending on the kernel config and the
compiler, it may modify r12 or it may not, so some config/compiler
combinations see the bug and others don't.

To fix this, we arrange for the trap number to be stored on the
stack from the 'guest_bypass:' label until the end of the function,
then the trap number is loaded and returned in r12 as before.

Cc: <email address hidden> # v4.8+
Fixes: fd7bacbca47a ("KVM: PPC: Book3S HV: Fix TB corruption in guest exit path on HMI interrupt")
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit a8b48a4dccea77e29462e59f1dbf0d5aa1ff167c)
Signed-off-by: Seth Forshee <email address hidden>

2301c03... by Paul Mackerras <email address hidden>

KVM: PPC: Book3S: Fix compile error that occurs with some gcc versions

BugLink: http://bugs.launchpad.net/bugs/1759045

Some versions of gcc generate a warning that the variable "emulated"
may be used uninitialized in function kvmppc_handle_load128_by2x64().
It would be used uninitialized if kvmppc_handle_load128_by2x64 was
ever called with vcpu->arch.mmio_vmx_copy_nums == 0, but neither of
the callers ever do that, so there is no actual bug. When gcc
generates a warning, it causes the build to fail because arch/powerpc
is compiled with -Werror.

This silences the warning by initializing "emulated" to EMULATE_DONE.

Fixes: 09f984961c13 ("KVM: PPC: Book3S: Add MMIO emulation for VMX instructions")
Reported-by: Michael Ellerman <email address hidden>
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit 6df3877fc962c2bb3d0438633dfd24a185af6838)
Signed-off-by: Seth Forshee <email address hidden>

b540072... by Jose Ricardo Ziviani <email address hidden>

KVM: PPC: Book3S: Add MMIO emulation for VMX instructions

BugLink: http://bugs.launchpad.net/bugs/1759045

This patch provides the MMIO load/store vector indexed
X-Form emulation.

Instructions implemented:
lvx: the quadword in storage addressed by the result of EA &
0xffff_ffff_ffff_fff0 is loaded into VRT.

stvx: the contents of VRS are stored into the quadword in storage
addressed by the result of EA & 0xffff_ffff_ffff_fff0.

Reported-by: Gopesh Kumar Chaudhary <email address hidden>
Reported-by: Balamuruhan S <email address hidden>
Signed-off-by: Jose Ricardo Ziviani <email address hidden>
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit 09f984961c137c4b252c368adab7e1c9f035fa59)
Signed-off-by: Seth Forshee <email address hidden>

334bd22... by David Gibson <email address hidden>

KVM: PPC: Book3S HV: Make HPT resizing work on POWER9

BugLink: http://bugs.launchpad.net/bugs/1759045

This adds code to enable the HPT resizing code to work on POWER9,
which uses a slightly modified HPT entry format compared to POWER8.
On POWER9, we convert HPTEs read from the HPT from the new format to
the old format so that the rest of the HPT resizing code can work as
before. HPTEs written to the new HPT are converted to the new format
as the last step before writing them into the new HPT.

This takes out the checks added by commit bcd3bb63dbc8 ("KVM: PPC:
Book3S HV: Disable HPT resizing on POWER9 for now", 2017-02-18),
now that HPT resizing works on POWER9.

On POWER9, when we pivot to the new HPT, we now call
kvmppc_setup_partition_table() to update the partition table in order
to make the hardware use the new HPT.

[<email address hidden> - added kvmppc_setup_partition_table() call,
 wrote commit message.]

Tested-by: Laurent Vivier <email address hidden>
Signed-off-by: David Gibson <email address hidden>
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit 790a9df5fbef982f2a6992194fe497dd2b794a3d)
Signed-off-by: Seth Forshee <email address hidden>

cec47f1... by Paul Mackerras <email address hidden>

KVM: PPC: Book3S HV: Fix handling of secondary HPTEG in HPT resizing code

BugLink: http://bugs.launchpad.net/bugs/1759045

This fixes the computation of the HPTE index to use when the HPT
resizing code encounters a bolted HPTE which is stored in its
secondary HPTE group. The code inverts the HPTE group number, which
is correct, but doesn't then mask it with new_hash_mask. As a result,
new_pteg will be effectively negative, resulting in new_hptep
pointing before the new HPT, which will corrupt memory.

In addition, this removes two BUG_ON statements. The condition that
the BUG_ONs were testing -- that we have computed the hash value
incorrectly -- has never been observed in testing, and if it did
occur, would only affect the guest, not the host. Given that
BUG_ON should only be used in conditions where the kernel (i.e.
the host kernel, in this case) can't possibly continue execution,
it is not appropriate here.

Reviewed-by: David Gibson <email address hidden>
Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit 05f2bb0313a2855e491dadfc8319b7da261d7074)
Signed-off-by: Seth Forshee <email address hidden>

8445b62... by Paul Mackerras <email address hidden>

KVM: PPC: Book3S HV: Do SLB load/unload with guest LPCR value loaded

BugLink: http://bugs.launchpad.net/bugs/1759045

This moves the code that loads and unloads the guest SLB values so that
it is done while the guest LPCR value is loaded in the LPCR register.
The reason for doing this is that on POWER9, the behaviour of the
slbmte instruction depends on the LPCR[UPRT] bit. If UPRT is 1, as
it is for a radix host (or guest), the SLB index is truncated to
2 bits. This means that for a HPT guest on a radix host, the SLB
was not being loaded correctly, causing the guest to crash.

The SLB is now loaded much later in the guest entry path, after the
LPCR is loaded, which for a secondary thread is after it sees that
the primary thread has switched the MMU to the guest. The loop that
waits for the primary thread has a branch out to the exit code that
is taken if it sees that other threads have commenced exiting the
guest. Since we have now not loaded the SLB at this point, we make
this path branch to a new label 'guest_bypass' and we move the SLB
unload code to before this label.

Signed-off-by: Paul Mackerras <email address hidden>
(cherry picked from commit 6964e6a4e4894c707e42d51d9d30683c57f43201)
Signed-off-by: Seth Forshee <email address hidden>