lp:~jurgen-defurne/12bitcpu/components

Created by Jurgen Defurne and last modified
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Owner:
Jurgen Defurne
Project:
12bitcpu
Status:
Mature

Recent revisions

204. By jurgen

Removed a whole lot of documentation to the dcs (src) library.

203. By beq00871

Added study for adapting the micro-controller toward SYS-2,r3 with
multiple registers.
  --This line, and those below, will be ignored--

M doc/controller.odt
AM doc/controller_with_instruction_decoding.odg

202. By jurgen

Added requirements of memory write pulse circuit.

201. By jurgen

Bug case for make-pathname in ECL.
Added ECL features for speed2 benchmark.
Added special build programs for ECL.
Added ECL features for components build.
Added ECL features for core application.

200. By beq00871

Add bug report for compiling ECL with MSVC 6.0.
Change core harnesses for running simulation.

199. By jurgen

Added extension for ecl.
Trying to build speed2 with ECL.

198. By jurgen

Additional bug-report on declaim of ftype with return value.

197. By jurgen

Test case for bug report ECL.

196. By jurgen

Test case for SBCL controlled by Python.
Listing with errors.
Update SBCL error status.

195. By jurgen

Moved LIST.org to LIST and added a startup command to it.

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