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Last commit made on 2024-03-15
Get this branch:
git clone -b stable-v2.9 https://git.launchpad.net/~canonical-hwe-team/hwe-next/+git/sof

Branch merges

Branch information

Name:
stable-v2.9
Repository:
lp:~canonical-hwe-team/hwe-next/+git/sof

Recent commits

c0b0e4c... by Kai Vehmanen

ipc4: fw_reg: downgrade FW_REGS version to 0 to disable delay reporting

Disable delay reporting as a workaround to bug
https://github.com/thesofproject/linux/issues/4781
SOF driver checks the ABI version and if it's not 1, delay reporting
is disabled.

Signed-off-by: Kai Vehmanen <email address hidden>

982a30f... by Kai Vehmanen

app: boards: intel_adsp_ace15_mtpm: disable IMR context-save

Keep context save still disabled for Intel Meteor Lake.

Signed-off-by: Kai Vehmanen <email address hidden>

50ed61f... by Kai Vehmanen

west.yml: update Zephyr with backported fixes

Update Zephyr with backported fixed from Zephyr upstream including
the following patches:

337b518c3311 dai: intel: dmic: demote spurious LOG_ERR in dai_nhlt_get_clock_div()
802baf38426b soc: xtensa: intel_adsp: restore bootctl with per-core state
576924d5f201 drivers: dma: intel-adsp-hda: modify stop dma logic
369241d7bf7d drivers: dma: intel-adsp-hda: add delay to stop host dma

Signed-off-by: Kai Vehmanen <email address hidden>

6b4f128... by Kai Vehmanen

versions.json: bump version to 2.9.0

Set version for stable-v2.9 branch.

Signed-off-by: Kai Vehmanen <email address hidden>

fe69031... by Tomasz Leman <email address hidden>

zephyr: pm_runtime: Remove outdated TODO comment

Clean up an incorrect TODO comment in the power management runtime
policy.

The removed comment suggested the need for substates to handle cases where
power gating (PG) is enabled and clock gating (CG) is disabled. However,
this is not accurate because:
- Enabling PG when CG is not allowed is not feasible; entering PG could
  inadvertently gate the clock even if CG prevent is active.
- Substates are no longer required as clock gating is now always enabled.

This change clarifies the power management behavior and removes confusion
around the handling of power and clock gating.

Signed-off-by: Tomasz Leman <email address hidden>

dc80db7... by Adrian Bonislawski <email address hidden>

app: perf_overlay: disable CONFIG_ADSP_IDLE_CLOCK_GATING

Perf build uses xtensa timer

Signed-off-by: Adrian Bonislawski <email address hidden>

ea1b65d... by Marc Herbert <email address hidden>

sof_ri_info: fix "full_bytes" comment in the source

Zero functional change.

Signed-off-by: Marc Herbert <email address hidden>

2d405d7... by Marc Herbert <email address hidden>

sof_ri_info: add MTL production key

Extracted from v2.8 v2.8.x/sof-ipc4-v2.8/mtl/intel-signed/sof-mtl.ri

Verified on v2.8.1 https://github.com/thesofproject/sof-bin/pull/162

Signed-off-by: Marc Herbert <email address hidden>

44376d8... by Guennadi Liakhovetski <email address hidden>

module: (cosmetic) use an existing local variable

modules_init() already has a "dev" variable, no need to re-calculate
it repeatedly.

Signed-off-by: Guennadi Liakhovetski <email address hidden>

1b0c084... by Marc Herbert <email address hidden>

xtensa-build-zephyr.py: clarify XTENSA_SYSTEM and XTENSA_CORE in --help

This has always been mysterious, try to shed a bit of light.

Signed-off-by: Marc Herbert <email address hidden>