~canonical-hwe-team/hwe-next/+git/sof:mt8186/v0.2

Last commit made on 2024-04-19
Get this branch:
git clone -b mt8186/v0.2 https://git.launchpad.net/~canonical-hwe-team/hwe-next/+git/sof

Branch merges

Branch information

Name:
mt8186/v0.2
Repository:
lp:~canonical-hwe-team/hwe-next/+git/sof

Recent commits

c346181... by "barry.jan" <email address hidden>

waves: verify payload size and initialize memory to zero to the
       allocated memory in waves.c

    Enhance payload corruption handling by verifying size
    and make sure to have clean buffer before using it.

Signed-off-by: barry.jan <email address hidden>
(cherry picked from commit 355e46f051dbd4493317662e13695685153c79b9)

475be1e... by "barry.jan" <email address hidden>

waves: store config blob in a cache in waves.c

Store/apply config blob in a cache to avoid that
cfg.data will be released after prepare.

Signed-off-by: barry.jan <email address hidden>

e4f8104... by "barry.jan" <email address hidden>

module_adapter: free memory resource

Since module-specific prepare API will be called every time on prepare
 of module_adapter (stream start trigger), the reset API should
free all memory that was allocated during the prepare API.

Signed-off-by: barry.jan <email address hidden>
(cherry picked from commit 6275d18ce2a58e85a5f77bcbdf133fcdc6722216)

714c6d4... by Chunxu Li <email address hidden>

topology1: mt8186: support 1ms pipeline capture period

Default support 1ms period capture pipeline to update host
position more precisely.

Signed-off-by: Chunxu Li <email address hidden>
(cherry picked from commit b0ae15a0bc17b1eea2e3e3b13b15b1d98ab1e5e3)

0c4e041... by Balakishorepati <email address hidden>

module_adapter:Fix dangling pointer issue in module reset

During module_reset and module_free Calls, pointers are not
getting reset to NULL which causes dangling pointer exceptions.
Initialize pointers to NULL after deallocating the memory.

Signed-off-by: Balakishorepati <email address hidden>
(cherry picked from commit 53b3bc6a956ae5957966336f88980438f1f85a88)

420aaa2... by Ranjani Sridharan <email address hidden>

module_adapter: Modify reset API

Modify the definition of the reset API in the module adapter interface
to make sure that it should reset the module state back to
MODULE_INITIALIZED and free all memory that was allocated during the
prepare() callback. With this change, stopping and restarting streams
will always be guaranteed to invoke the module's prepare() callback.
Also, fix the passthrough and cadence codec implementation to follow the
new definition.

Signed-off-by: Guennadi Liakhovetski <email address hidden>
Signed-off-by: Ranjani Sridharan <email address hidden>
(cherry picked from commit b9889d52d0e1b6002ee016b55fa0487544fc0593)

ab20162... by Pin-chih Lin <email address hidden>

module_adapter: get the actual period_bytes

At present module_adapter, period_bytes is calculated assuming the schedule
period is 1ms, which could be arbitrary in practice determined by the
topology.

This commit replaces the calculation code by audio_stream_period_bytes().
In addition, the timing for getting period_bytes is moved to the beginning
of prepare() (prior to the module prepare). At that moment it is guaranteed
that all parameters in components/buffers are settled through the pipeline.

Signed-off-by: Pin-chih Lin <email address hidden>
(cherry picked from commit b3106c396e540c260bba3b08c218f6598ea74726)

ba6a29d... by Pierre-Louis Bossart <email address hidden>

dai: move AMD_HS to end of list to restore backwards-compatibility

The addition of AMD_HS breaks Mediatek platforms by using an index
previously allocated to Mediatek. This is a backwards-compatibility
issue and needs to be fixed. All firmware released by AMD needs to be
re-generated and re-distributed.

Fixes: 83ee5b49a987 ("dai: support for amd specific hs dai id")
Link: https://github.com/thesofproject/sof/issues/6615
Link: https://<email address hidden>/
Reported-by: AngeloGioacchino Del Regno <email address hidden>
Signed-off-by: Pierre-Louis Bossart <email address hidden>

d3d49dc... by Tinghan Shen <email address hidden>

platform: mt8186: Disable ADSPPLL in S3 stage

The ADSPPLL clock is expected to be disabled in S3 stage.
Fail to disable it may have premature wakeup in S3 stage.

Signed-off-by: Tinghan Shen <email address hidden>

77e6f34... by Tinghan Shen <email address hidden>

platform: mt8186: Revise mt8186 clock flow

Add the missing necessary delay after changing DSP bus frequency.

Change the core frequency when initialize clock to avoid
altering the core frequency in the middle of execution.

Signed-off-by: Tinghan Shen <email address hidden>