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85657c3... by Iuliana Prodan <email address hidden> on 2023-03-02

scripts: qemu-check.sh: update READY_IPC for imx8

Update READY_IPC value based on changes regarding
interrupt initialization.

Signed-off-by: Iuliana Prodan <email address hidden>
(cherry picked from commit c74972bbee08020aa92361c401bc801ef7518ae4)

c50b73a... by Iuliana Prodan <email address hidden> on 2023-03-02

imx: fix GIP bits clear method

mx_mu_xsr_rmw() doesn't work correctly for w1c bits
because it reads the register and writes it back fully.
So, use imx_mu_write to clear pending interrupts from MU,
instead of imx_mu_xsr_rmw.

Using imx_mu_xsr_rmw might clear a pending interrupt that
was triggered while handling the current interrupt.

This fixes the case when fw boot confirmation and first
command are sent, from kernel, close to each other and
the command is missed.

Signed-off-by: Iuliana Prodan <email address hidden>
Signed-off-by: Daniel Baluta <email address hidden>
(cherry picked from commit 1cd5dd1a576e77583d1f87e077872ebfec056c7d)

de1cbac... by Iuliana Prodan <email address hidden> on 2023-02-23

imx: fix interrupt initialization

Fix interrupt initialization by:
- disable interrupt for DSP Core;
- disable interrupt from MU;
- clear pending interrupt from MU;
- clear pending interrupt for DSP Core;
- configure interrupt for DSP Core;
- enable interrupt from MU.

Signed-off-by: Iuliana Prodan <email address hidden>
(cherry picked from commit fb36120bf8d814b98a44eb558aa0b076fce5b64c)

cdb90db... by Iuliana Prodan <email address hidden> on 2022-12-05

scripts: qemu-check.sh: update READY_IPC for imx8

Update READY_IPC value based on changes regarding MU reset.
READY_IPC value comes from:
- clear GP pending interrupt #0 and #1 from MU's xSR register;
- enable GP #0 and #1 for Host -> DSP and DSP -> Host
message notification from MU's xCR register;
- now interrupt host to tell it we are done booting
by setting GIRn bit in MU's xCR register.

So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers:
xSR: c0000000 and xCR: c0040000

Signed-off-by: Iuliana Prodan <email address hidden>
(cherry picked from commit 6131901c46bb3cbff0b630cf5fbdd040e79af018)

28930a3... by Iuliana Prodan <email address hidden> on 2022-11-22

imx: clear general purpose pending interrupt

Clear general purpose pending interrupt
before enabling interrupts between host and DSP.
The GIPn bit, from MU Status Register is cleared
by writing it as “1” in order to de-assert the
interrupt request source at the interrupt controller.

This fixes a fw loading failure after a soft reboot
caused by GIP bit that was 1.
The problem was the MU which triggered endless interrupts
causing timeout on Kernel side, which was waiting for
FW_READY message.

Signed-off-by: Iuliana Prodan <email address hidden>
(cherry picked from commit 4a9a99aeb24ac7fbcf3cf80973ac8f119a16c6e5)

29f4fe6... by Daniel Baluta <email address hidden> on 2022-10-19

module_adapter: Fix compile time error

After commit e101aadcd1dc98 ("module_adapter: drop the comp_get_module_data() macro")
API prototype was changed to accept a `processing_module` instead of a
`comp_dev` but `dev` was still used inside passthrough_codec_free which
generates a compile time error:

src/audio/module_adapter/module/passthrough.c:110:12: error: 'dev'
undeclared (first use in this function)
  comp_info(dev, "passthrough_codec_free()");

Signed-off-by: Daniel Baluta <email address hidden>

d97a286... by Daniel Baluta <email address hidden> on 2022-10-04

topology1: Add topology with wm8960/cs42888 for imx8qxp/imx8qm

This topology is used for i.MX8QXP/i.MX8QM with baseboard
to enable both cs42888 and wm8960 codecs.

Signed-off-by: Daniel Baluta <email address hidden>
(cherry picked from commit 5b63f446d2e246a798738d708388ebc53414f573)

c0bd981... by Daniel Baluta <email address hidden> on 2022-09-29

Revert "xtensa: configs: Enable comp legacy on i.MX platforms"

This reverts commit 1044e004e4ecbaf9a6ff53a2aa253e9072d8f535.

On i.MX platforms we noticed a bug were playback followed by
capture would cause capture to fail.

This issue was later fixed by:
commit b9889d52d0e1b ("module_adapter: Modify reset API")

so we can get rid of CONFIG_LEGACY_INTERFACE.

Signed-off-by: Daniel Baluta <email address hidden>
(cherry picked from commit 6853616cfc782aeccbbffb1e7ed43bca208e84d2)

29ab79b... by Daniel Baluta <email address hidden> on 2022-09-26

topology1: Merge i.MX AAC/MP3 compr topology

Because now we can support multiple codecs with same topology
lets merge i.MX aac/mp3 topologies.

Signed-off-by: Daniel Baluta <email address hidden>
(cherry picked from commit 19661fe74acf824f9bcbac48b9d2d54224785eb7)

b0afc6b... by Daniel Baluta <email address hidden> on 2022-09-26

topology1: Update documentation to reflect multicodec support

This updates documentation to reflect that now param id is only 2 bytes
followed by 2 bytes codec id.

Signed-off-by: Daniel Baluta <email address hidden>
(cherry picked from commit e60caa0c0cdfbc37658396fc4d0f22067410643a)