Last commit made on 2020-11-24
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a6ed54f... by Seppo Ingalsuo <email address hidden> on 2020-11-06

Topology: Change minimum bus clock to 2.4 MHz for 48 kHz DMIC DAI

The driver configures a lowest feasible bus clock to save power.
Since the 48 kHz and 16 kHz DMIC DAI can now be instantiated in the
runtime there is possibility that the min. 500 kHz clock allowed could
be too low for a new 48 kHz capture when existing 16 kHz capture is

The topologies those define a 48 kHz DMIC DAI need to increase the min.
clock to a sufficient rate. This patch changes every 500 kHz value to
2.4 MHz. This change does not change the external microphone clock in
any platform. The lower than 2.4 MHz clock rates never happened in
previous version to due to the 48 kHz DAI request in these topologies.

Signed-off-by: Seppo Ingalsuo <email address hidden>

1b1e0b6... by Seppo Ingalsuo <email address hidden> on 2020-11-10

Drivers: DMIC: Move decimation factors 5 and 10 to less preferred

This patch changes FIR decimation factors preference from
"2, 3, 4, 5, 6, 8, 10, 12" to "2, 3, 4, 6, 5, 8, 12, 10".

The prime number factor 5 and 10 (2*5) are less preferred because
when used for decimate for fist started FIR they restrict more the
configuration choices for the second FIR. If e.g. capture at 16 kHz
is started first with decimation factor 6, the 48 kHz stream can be
decimated from common 96 kHz CIC rate by 2.

Earlier the driver selected decimation by 5 to 16 kHz. There is no
integer decimation factor to decimate from 80 kHz to 48 kHz.

Similarly if decimate to 8 kHz programmed FIR to decimate by 10, the
same 80 kHz rate prevents 48 kHz for the other DAI. Decimation factor
12 sets up CIC to 96 kHz that is compatible with many other sample

Signed-off-by: Seppo Ingalsuo <email address hidden>

45dc1f0... by Seppo Ingalsuo <email address hidden> on 2020-11-09

Drivers: DMIC: Make FIR decimation factor preference order configurable

This patch changes the logic in function select_mode() to use
the defined FIR decimation filters as order of preference for
FIR decimation factors. The earlier logic was simply to select the
lowest decimation factor. It can be used to e.g. prefer decimation
factor 6 over 5 when both are possible.

The driver mode select behavior is not yet changed in this patch. The
filters are presented in increasing decimation factor order in the
header file. The preference order is changed in other patch.

Signed-off-by: Seppo Ingalsuo <email address hidden>

6ba7c26... by Seppo Ingalsuo <email address hidden> on 2020-11-09

Drivers: DMIC: Fix a mistake in FIR length and update the entire set

The maximum length supported by HW is 250 while the existing decimate
by 5 set is 251. Load attempt of it failed always. However it was
needed only in a rare 8 and 16 kHz FIFOs configuration request.

The new coefficients set fixes the issue. Also an alternate decimate
by 3 set is removed as unnecessary and a decimate by 10 set is added.

The DMIC filters design tool was updated for including to SOF tools.
The specification adjust iteration in FIR design was improved to use
finer step for bandwidth (the two four digits numbers in file name
are band frequencies relative to sample rate) so many of the
coefficients are changed. The CIC response estimation gives slightly
different result depending on for which sample rate the decimation factor
is. That is another reason for changed coefficients.

This set is used to have the reference generate script available that
creates these coefficients exactly.

Signed-off-by: Seppo Ingalsuo <email address hidden>

3fb45d5... by Seppo Ingalsuo <email address hidden> on 2020-11-05

Drivers: Intel: Updates to DMIC for runtime instantiate and remove DAI

This patch separates from function configure_registers() the write
of FIFO A, FIFO B, and common functions initialization. The change
allows the DMIC DAI type to be instantiated when the streaming starts
and removed after streaming ends. The driver for was designed to
configure the HW in firmware initialization. It didn't support DAI
initialization at streaming start and remove at end. The start of second
DAI stopped the first. Also the decimation factors selection made
choices those prevented the second DAI to find suitable integer
decimation factors.

The key change is that common functions like CIC are programmed for
first instantiating. The FIR A and the FIFO are set up for FIFO A
connected DAI and FIR B related for FIFO B connected DAI.

The dmic_remove() is changed to pass the common resources stop and
free if there's still a running FIFO left.

The traced registers configuration are changed to 32 bit hex for easier
manual decode of bit fields when debugging.

Signed-off-by: Seppo Ingalsuo <email address hidden>
Signed-off-by: Ranjani Sridharan <email address hidden>

3c5c7b8... by Daniel Baluta <email address hidden> on 2020-11-23

drivers: imx: sai: Use rate from topology

So far we only used topologies with rate set
to 48KHz. This is no longer true now when
we enabled KWD pipelines.

So, use rate from parameters passed from kernel.

Signed-off-by: Daniel Baluta <email address hidden>

f5441a1... by Daniel Baluta <email address hidden> on 2020-11-23

ipc: dai: Align sof_ipc_dai_sai_params with kernel

We add fsync_rate, bclk_rate because now we
actually need them.

Also, notice that mclk_rate was moved near the other rates

I think this was broken from the beginning but didn't
show up as a bug because SAI is used in consumer mode
and the clock is provided by the codec.

Signed-off-by: Daniel Baluta <email address hidden>

d2ecb57... by Daniel Baluta <email address hidden> on 2020-11-23

drivers: imx: sai: Add SAI private data

We allocate SAI private data to save config and
parameters and use them later.

Signed-off-by: Daniel Baluta <email address hidden>

90955de... by Guennadi Liakhovetski <email address hidden> on 2020-10-27

hal: remove unused files

Prevent unused Xtensa XTOS files from building but keep them in the tree
until migration to Zephyr completes.

Signed-off-by: Guennadi Liakhovetski <email address hidden>

1d39806... by Guennadi Liakhovetski <email address hidden> on 2020-11-19

zephyr: extend the wrapper for generic architecture support

When building SOF with Zephyr for unsupported architectures
the following additional adjustments to the wrapper are required:
2. implement stubs for interrupt handlich code
3. remove arch_timer_get_system() as it's provided by a header
4. hardcode "return 0;" for platform_timer_get()
5. disable sys_module_init() which anyway isn't yet functional
   under Zephyr
6. add dummy platform_init() and platform_boot_complete()
7. add log_const_sof

Signed-off-by: Guennadi Liakhovetski <email address hidden>