Merge lp:~ams-codesourcery/gcc-linaro/thumb-16bit-ops-4.6 into lp:gcc-linaro/4.6

[Andrew Stubbs]

Improve use of 16-bit thumb instructions, and conditional execution.

This is the same patch just committed upstream and to Linaro GCC 4.7.

[Michael Hope (michaelh1)]

cbuild has taken a snapshot of this branch at r106882 and queued it for build.

The diff against the ancestor r106881 is available at:
 http://builds.linaro.org/toolchain/snapshots/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6.diff

and will be built on the following builders:
 a9-builder armv5-builder i686 x86_64

You can track the build queue at:
 http://ex.seabright.co.nz/helpers/scheduler

cbuild-snapshot: gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6
cbuild-ancestor: lp:gcc-linaro+bzr106881
cbuild-state: check

[Michael Hope (michaelh1)]

cbuild successfully built this on x86_64-natty-cbuild274-oort1-x86_64r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/x86_64-natty-cbuild274-oort1-x86_64r1

The testsuite results are the same as the branch point lp:gcc-linaro+bzr106881

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/x86_64-natty-cbuild274-oort1-x86_64r1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/x86_64-natty-cbuild274-oort1-x86_64r1/gcc-testsuite.txt

cbuild-checked: x86_64-natty-cbuild274-oort1-x86_64r1

[Michael Hope (michaelh1)]

cbuild successfully built this on i686-natty-cbuild274-oort2-i686r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/i686-natty-cbuild274-oort2-i686r1

The testsuite results are the same as the branch point lp:gcc-linaro+bzr106881

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/i686-natty-cbuild274-oort2-i686r1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/i686-natty-cbuild274-oort2-i686r1/gcc-testsuite.txt

cbuild-checked: i686-natty-cbuild274-oort2-i686r1

[Michael Hope (michaelh1)]

cbuild successfully built this on armv7l-natty-cbuild276-tcpanda04-armv5r2.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda04-armv5r2

+UNSUPPORTED: gcc.target/arm/thumb-16bit-ops.c
+UNSUPPORTED: gcc.target/arm/thumb-ifcvt.c

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda04-armv5r2/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda04-armv5r2/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild276-tcpanda04-armv5r2

[Michael Hope (michaelh1)]

cbuild successfully built this on armv7l-natty-cbuild276-tcpanda02-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda02-cortexa9r1

+PASS: gcc.target/arm/thumb-16bit-ops.c (test for excess errors)
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler add\tr0, r0, #256
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler add\tr0, r1, #8
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r0, #255
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler adds\tr0, r1, #7
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asr\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asrs\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler asrs\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsl\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsls\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsls\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsr\tr0, r1, r2
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsrs\tr0, r0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler lsrs\tr0, r1, #15
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mov\tr0, #256
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mov\tr0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler movs\tr0, #255
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler muls\tr0, r1, r0
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler mvns\tr0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler negs\tr0, r1
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler sub\tr0, r0, #256
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler sub\tr0, r1, #8
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler subs\tr0, r0, #255
+PASS: gcc.target/arm/thumb-16bit-ops.c scan-assembler subs\tr0, r1, #7
+PASS: gcc.target/arm/thumb-ifcvt.c (test for excess errors)
+PASS: gcc.target/arm/thumb-ifcvt.c scan-assembler asrne
+PASS: gcc.target/arm/thumb-ifcvt.c scan-assembler lslne

The full diff is at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda02-cortexa9r1/testsuite-diff.txt

The full testsuite results are at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.6+bzr106882~ams-codesourcery~thumb-16bit-ops-4.6/logs/armv7l-natty-cbuild276-tcpanda02-cortexa9r1/gcc-testsuite.txt

cbuild-checked: armv7l-natty-cbuild276-tcpanda02-cortexa9r1

[Ulrich Weigand (uweigand)]

This is OK.

review: Approve