Merge lp:~ams-codesourcery/gcc-linaro/lp675347 into lp:gcc-linaro/4.5

Proposed by Andrew Stubbs on 2011-03-23
Status: Merged
Approved by: Andrew Stubbs on 2011-04-14
Approved revision: 99490
Merged at revision: 99493
Proposed branch: lp:~ams-codesourcery/gcc-linaro/lp675347
Merge into: lp:gcc-linaro/4.5
Diff against target: 35 lines (+15/-2)
2 files modified
ChangeLog.linaro (+10/-0)
gcc/expr.c (+5/-2)
To merge this branch: bzr merge lp:~ams-codesourcery/gcc-linaro/lp675347
Reviewer Review Type Date Requested Status
Andrew Stubbs (community) Approve on 2011-04-14
Linaro Toolchain Builder 2011-03-23 Approve on 2011-03-24
Review via email: mp+54512@code.launchpad.net

Description of the change

This is the patch Julian Brown has committed upstream to fix bug #675347.

I've backported it to GCC 4.5.

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Linaro Toolchain Builder (cbuild) wrote :

cbuild has taken a snapshot of this branch at r99490 and queued it for
build.

The snapshot is available at:
 http://ex.seabright.co.nz/snapshots/

and named something like gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347.*

You can track the build queue at:
 http://ex.seabright.co.nz/helpers/scheduler

cbuild-snapshot: gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347
cbuild-state: check

Linaro Toolchain Builder (cbuild) wrote :

cbuild successfully built this on i686-lucid-cbuild93-scorpius-i686r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347/logs/i686-lucid-cbuild93-scorpius-i686r1

cbuild-checked: i686-lucid-cbuild93-scorpius-i686r1

review: Approve
Linaro Toolchain Builder (cbuild) wrote :

cbuild successfully built this on x86_64-maverick-cbuild93-crucis-x86_64r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347/logs/x86_64-maverick-cbuild93-crucis-x86_64r1

cbuild-checked: x86_64-maverick-cbuild93-crucis-x86_64r1

review: Approve
Linaro Toolchain Builder (cbuild) wrote :

cbuild successfully built this on armv7l-maverick-cbuild93-ursa2-cortexa9r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347/logs/armv7l-maverick-cbuild93-ursa2-cortexa9r1

cbuild-checked: armv7l-maverick-cbuild93-ursa2-cortexa9r1

Linaro Toolchain Builder (cbuild) wrote :

cbuild successfully built this on armv7l-maverick-cbuild93-ursa1-cortexa8r1.

The build results are available at:
 http://ex.seabright.co.nz/build/gcc-linaro-4.5+bzr99490~ams-codesourcery~lp675347/logs/armv7l-maverick-cbuild93-ursa1-cortexa8r1

cbuild-checked: armv7l-maverick-cbuild93-ursa1-cortexa8r1

Andrew Stubbs (ams-codesourcery) wrote :

The test results show that this patch causes a segmentation fault in some of the tests:

FAIL: gcc.dg/pch/counter-1.c -O0 -g -I. (test for excess errors)
FAIL: gcc.dg/pch/counter-1.c -O2 -I. (test for excess errors)
FAIL: gcc.dg/pch/cpp-2.c -O0 -g -I. (test for excess errors)
FAIL: gcc.dg/pch/cpp-3.c -O3 -g -I. (test for warnings, line )
FAIL: gcc.dg/pch/cpp-3.c -O3 -g -I. (test for excess errors)
[and others ....]

review: Needs Fixing
Andrew Stubbs (ams-codesourcery) wrote :

These failures turn out to be random problems with the test scripts/hardware.

review: Approve
Ira Rosen (irar) wrote :

I am out of the office until 17/04/2011.

Note: This is an automated response to your message "Re: [Merge]
lp:~ams-codesourcery/gcc-linaro/lp675347 into lp:gcc-linaro" sent on
14/4/2011 14:23:42.

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1=== modified file 'ChangeLog.linaro'
2--- ChangeLog.linaro 2011-03-11 17:36:50 +0000
3+++ ChangeLog.linaro 2011-03-23 13:14:50 +0000
4@@ -1,3 +1,13 @@
5+2011-03-23 Andrew Stubbs <ams@codesourcery.com>
6+
7+ Backport from FSF.
8+
9+ 2011-03-23 Julian Brown <julian@codesourcery.com>
10+
11+ gcc/
12+ * expr.c (expand_expr_real_1): Only use BLKmode for volatile
13+ accesses which are not naturally aligned.
14+
15 2011-03-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
16
17 LP:730440
18
19=== modified file 'gcc/expr.c'
20--- gcc/expr.c 2011-02-22 11:38:56 +0000
21+++ gcc/expr.c 2011-03-23 13:14:50 +0000
22@@ -9032,8 +9032,11 @@
23 && modifier != EXPAND_CONST_ADDRESS
24 && modifier != EXPAND_INITIALIZER)
25 /* If the field is volatile, we always want an aligned
26- access. */
27- || (volatilep && flag_strict_volatile_bitfields > 0)
28+ access. Only do this if the access is not already naturally
29+ aligned, otherwise "normal" (non-bitfield) volatile fields
30+ become non-addressable. */
31+ || (volatilep && flag_strict_volatile_bitfields > 0
32+ && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
33 /* If the field isn't aligned enough to fetch as a memref,
34 fetch it as a bit field. */
35 || (mode1 != BLKmode

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