---Changelog---
RFC v6:
- Rebase on top of accetpted patches
- Fix issues so that the tests actually run
RFC v5:
- Hopefully finally get the correct layout for the *64 syscalls
- Sort out the Changelog
RFC v4:
- Continue to fix things that weren't working
- Update the coding style to match glibc
- Update the __ASSUME_TIME64_SYSCALLS work to better match Lukasz's
work
RFC v3:
- Remove all "Hack" patches
- Incorporate upstream comments
- Ensure we don't break RV64
- Lot's more testing and fixes
RFC v2:
- Add Lukasz's patches
- Update the non HACK syscalls after feedback
- define __ASSUME_TIME64_SYSCALLS and __ASSUME_RLIM64_SYSCALLS
- Remove lockf64.c
- Other smaller changes from RFC v1
Support building three variant of 32 bit RISC-V glibc as follows:
- riscv32-linux-gnu-rv32imac-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32
- riscv32-linux-gnu-rv32imafdc-ilp32d
This patch lays out the top-level orginazition of the RISC-V 32-bit port. It
contains all the Implies files as well as various other fragments of
build infastructure for the RISC-V 32-bit port.
RISC-V: Fix llrint and llround missing exceptions on RV32
Similar to the fix for MIPS, ARM and S/390, RV32 is missing
correct exception on overflow from llrint and llround functions because
cast from floating-point types to long long do not result in correct
exceptions on overflow.
1501294...
by
Alistair Francis <email address hidden>
RISC-V: Add the RV32 libm-test-ulps
Add a libm-test-ulps for RV32, generated by running `make regen-ulps`.
This is different to the RV64 one.
Signed-off-by: Alistair Francis <email address hidden>
2cb7d3d...
by
Alistair Francis <email address hidden>
RISC-V: Add ABI lists
Use the check-api and update-abi to generate the abilist for rv32.