Test code on maverick (no explicate it block):
mcasadevall@risingsun:/srv/chroots/maverick-armel$ cat test.c #include <stdio.h>
int _q_value = 10;
inline bool testAndSetOrdered(int expectedValue, int newValue) { register int result; asm volatile("0:\n" "ldrex %[result], [%[_q_value]]\n" "eors %[result], %[result], %[expectedValue]\n" "strexeq %[result], %[newValue], [%[_q_value]]\n" "teqeq %[result], #1\n" "beq 0b\n" : [result] "=&r" (result), "+m" (_q_value) : [expectedValue] "r" (expectedValue), [newValue] "r" (newValue), [_q_value] "r" (&_q_value) : "cc", "memory"); return result == 0; }
int main() { return testAndSetOrdered(1, 1); }
Relevant disassembly from objdump:
00008378 <_Z17testAndSetOrderedii>: 8378: b490 push {r4, r7} 837a: b082 sub sp, #8 837c: af00 add r7, sp, #0 837e: 6078 str r0, [r7, #4] 8380: 6039 str r1, [r7, #0] 8382: f241 0124 movw r1, #4132 ; 0x1024 8386: f2c0 0101 movt r1, #1 838a: 6878 ldr r0, [r7, #4] 838c: f8d7 c000 ldr.w ip, [r7] 8390: f241 0324 movw r3, #4132 ; 0x1024 8394: f2c0 0301 movt r3, #1 8398: f241 0224 movw r2, #4132 ; 0x1024 839c: f2c0 0201 movt r2, #1 83a0: e853 4f00 ldrex r4, [r3] 83a4: 4044 eors r4, r0 83a6: bf02 ittt eq 83a8: e843 c400 strexeq r4, ip, [r3] 83ac: f094 0f01 teqeq r4, #1 83b0: e7f6 beq.n 83a0 <_Z17testAndSetOrderedii+0x28> 83b2: 2c00 cmp r4, #0 83b4: bf14 ite ne 83b6: 2300 movne r3, #0 83b8: 2301 moveq r3, #1 83ba: b2db uxtb r3, r3 83bc: 4618 mov r0, r3 83be: f107 0708 add.w r7, r7, #8 83c2: 46bd mov sp, r7 83c4: bc90 pop {r4, r7} 83c6: 4770 bx lr
Test code on maverick (no explicate it block):
mcasadevall@ risingsun: /srv/chroots/ maverick- armel$ cat test.c
#include <stdio.h>
int _q_value = 10;
inline bool testAndSetOrder ed(int expectedValue, int newValue)
"ldrex %[result], [%[_q_value]]\n"
"eors %[result], %[result], %[expectedValue]\n"
"strexeq %[result], %[newValue], [%[_q_value]]\n"
"teqeq %[result], #1\n"
"beq 0b\n"
"+ m" (_q_value)
[newValue] "r" (newValue),
[_ q_value] "r" (&_q_value)
{
register int result;
asm volatile("0:\n"
: [result] "=&r" (result),
: [expectedValue] "r" (expectedValue),
: "cc", "memory");
return result == 0;
}
int main() { ed(1, 1);
return testAndSetOrder
}
Relevant disassembly from objdump:
00008378 <_Z17testAndSet Orderedii> : Orderedii+ 0x28>
8378: b490 push {r4, r7}
837a: b082 sub sp, #8
837c: af00 add r7, sp, #0
837e: 6078 str r0, [r7, #4]
8380: 6039 str r1, [r7, #0]
8382: f241 0124 movw r1, #4132 ; 0x1024
8386: f2c0 0101 movt r1, #1
838a: 6878 ldr r0, [r7, #4]
838c: f8d7 c000 ldr.w ip, [r7]
8390: f241 0324 movw r3, #4132 ; 0x1024
8394: f2c0 0301 movt r3, #1
8398: f241 0224 movw r2, #4132 ; 0x1024
839c: f2c0 0201 movt r2, #1
83a0: e853 4f00 ldrex r4, [r3]
83a4: 4044 eors r4, r0
83a6: bf02 ittt eq
83a8: e843 c400 strexeq r4, ip, [r3]
83ac: f094 0f01 teqeq r4, #1
83b0: e7f6 beq.n 83a0 <_Z17testAndSet
83b2: 2c00 cmp r4, #0
83b4: bf14 ite ne
83b6: 2300 movne r3, #0
83b8: 2301 moveq r3, #1
83ba: b2db uxtb r3, r3
83bc: 4618 mov r0, r3
83be: f107 0708 add.w r7, r7, #8
83c2: 46bd mov sp, r7
83c4: bc90 pop {r4, r7}
83c6: 4770 bx lr