Comment 18 for bug 1935617

Revision history for this message
Christian Ehrhardt  (paelzer) wrote :

And that matches:

Offending commit:

bcb0b7b1a1c05707304f80ca6f523d557816f85c is the first new commit
commit bcb0b7b1a1c05707304f80ca6f523d557816f85c
Author: Giuseppe Musacchio <email address hidden>
Date: Mon Nov 9 10:17:11 2020 +0100

    ppc/translate: Rewrite gen_lxvdsx to use gvec primitives

    Make the implementation match the lxvwsx one.
    The code is now shorter smaller and potentially faster as the
    translation will use the host SIMD capabilities if available.

    No functional change.

    Signed-off-by: Giuseppe Musacchio <email address hidden>
    Message-Id: <a463dea379da4cb3a22de49c678932f74fb15dd7<email address hidden>>
    Reviewed-by: Richard Henderson <email address hidden>
    Signed-off-by: David Gibson <email address hidden>

 target/ppc/translate/vsx-impl.c.inc | 46 ++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

And if you remember the backtraces above, it was lbzx / lvx / ld that failed which could be implemented that way or conflict the the actual lxvdsx.

And - as always - once you know what you look for it is easier to identify the fix.
I think this one is worth a try:

commit 861f10fd528263a507476b8c4dda93a9588dfa5c
Author: Giuseppe Musacchio <email address hidden>
Date: Tue May 18 15:30:20 2021 +0200

    target/ppc: Fix load endianness for lxvwsx/lxvdsx

    TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a
    runtime-configurable parameter.

    Fixes: bcb0b7b1a1c05707304f80ca6f523d557816f85c
    Fixes: afae37d98ae991c0792c867dbd9f32f988044318
    Resolves: https://gitlab.com/qemu-project/qemu/-/issues/212

    Signed-off-by: Giuseppe Musacchio <email address hidden>
    Message-Id: <email address hidden>
    Tested-by: Paul A. Clarke <email address hidden>
    Signed-off-by: David Gibson <email address hidden>